FUNCTIONAL BLOCK DIAGRAM
15-Lead Through-Hole SIP (Y) and Surface-Mount
DDPAK(VR)
NC
NC
NC
+IN1
–IN1
OUT1
–VS
+VS
OUT2
–IN2
+IN2
NC
NC
NC
NC
1
2
3
4
5
6
7
8
9
15
11
12
13
14
10
AD815
TAB IS
+VS
NC = NO CONNECT
REFER TO PAGE 3 FOR 24-LEAD SOIC PACKAGE
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a High Output CurrentDifferential Driver
AD815
PRODUCT DESCRIPTION
The AD815 consists of two high speed amplifiers capable of
supplying a minimum of 500 mA. They are typically configured
as a differential driver enabling an output signal of 40 V p-p on
– 15 V supplies. This can be increased further with the use of a
FEATURES
Flexible Configuration
Differential Input and Output Driver
or Two Single-Ended Drivers
High Output Power
Power Package
26 dBm Differential Line Drive for ADSL Application
40 V p-p Differential Output Voltage, RL = 50 V
500 mA Minimum Output Drive/Amp, RL = 5 V
Thermally Enhanced SOIC
400 mA Minimum Output Drive/Amp, RL = 10 V
Low Distortion
–66 dB @ 1 MHz THD, RL = 200 V, VOUT = 40 V p-p
0.05% and 0.458 Differential Gain and Phase, RL = 25 V
(6 Back-Terminated Video Loads)
High Speed
120 MHz Bandwidth (–3 dB)
900 V/ms Differential Slew Rate
70 ns Settling Time to 0.1%
Thermal Shutdown
APPLICATIONS
ADSL, HDSL and VDSL Line Interface Driver
Coil or Transformer Driver
CRT Convergence and Astigmatism Adjustment
Video Distribution Amp
Twisted Pair Cable Driver
FREQUENCY – Hz
–40
–50
–110
100 10M1k
TO
TA
L
HA
RM
O
NI
C
DI
ST
O
RT
IO
N
–
dB
c
10k 100k 1M
–60
–70
–80
–90
–100
VS = 615V
G = +10
VOUT = 40V p-p
RL = 50V
(DIFFERENTIAL)
RL = 200V
(DIFFERENTIAL)
Total Harmonic Distortion vs. Frequency
AMP1
+15V
–15V
RL
120V110V
499V
VOUT =
40Vp-p
VIN =
4Vp-p
1/2
AD815
1/2
AD815
G = +10
100V
100V AMP2
VD =
40Vp-p
1:2
TRANSFORMER
R1 = 15V
R2 = 15V
499V
Subscriber Line Differential Driver
coupling transformer with a greater than 1:1 turns ratio. The
low harmonic distortion of –66 dB @ 1 MHz into 200 W
combined with the wide bandwidth and high current drive make
the differential driver ideal for communication applications such
as subscriber line interfaces for ADSL, HDSL and VDSL.
The AD815 differential slew rate of 900 V/m s and high load drive
are suitable for fast dynamic control of coils or transformers,
and the video performance of 0.05% and 0.45° differential gain
and phase into a load of 25 W enable up to 12 back-terminated
loads to be driven.
Three package styles are available, and all work over the
industrial temperature range (–40 ° C to +85 ° C). Maximum
output power is achieved with the power package available for
through-hole mounting (Y) and surface-mounting (VR). The
24-lead SOIC (RB) is capable of driving 26 dBm for full rate
ADSL with proper heat sinking.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 1999
AD815–SPECIFICATIONS
AD815A
Model Conditions VS Min Typ Max Units
DYNAMIC PERFORMANCE
Small Signal Bandwidth (–3 dB) G = +1 – 15 100 120 MHz
G = +1 – 5 90 110 MHz
Bandwidth (0.1 dB) G = +2 – 15 40 MHz
G = +2 – 5 10 MHz
Differential Slew Rate VOUT = 20 V p-p, G = +2 – 15 800 900 V/ m s
Settling Time to 0.1% 10 V Step, G = +2 – 15 70 ns
NOISE/HARMONIC PERFORMANCE
Total Harmonic Distortion f = 1 MHz, RLOAD = 200 W , VOUT = 40 V p-p – 15 –66 dBc
Input Voltage Noise f = 10 kHz, G = +2 (Single Ended) – 5, – 15 1.85 nV/ Ö Hz
Input Current Noise (+IIN) f = 10 kHz, G = +2 – 5, – 15 1.8 pA/ Ö Hz
Input Current Noise (–IIN) f = 10 kHz, G = +2 – 5, – 15 19 pA/ Ö Hz
Differential Gain Error NTSC, G = +2, RLOAD = 25 W – 15 0.05 %
Differential Phase Error NTSC, G = +2, RLOAD = 25 W – 15 0.45 Degrees
DC PERFORMANCE
Input Offset Voltage – 5 5 8 mV
– 15 10 15 mV
TMIN – TMAX 30 mV
Input Offset Voltage Drift 20 m V/° C
Differential Offset Voltage – 5 0.5 2 mV
– 15 0.5 4 mV
TMIN – TMAX 5 mV
Differential Offset Voltage Drift 10 m V/° C
–Input Bias Current – 5, – 15 10 90 m A
TMIN – TMAX 150 m A
+Input Bias Current – 5, – 15 2 5 m A
TMIN – TMAX 5 m A
Differential Input Bias Current – 5, – 15 10 75 m A
TMIN – TMAX 100 m A
Open-Loop Transresistance – 5, – 15 1.0 5.0 M W
TMIN – TMAX 0.5 M W
INPUT CHARACTERISTICS
Differential Input Resistance +Input – 15 7 M W
–Input 15 W
Differential Input Capacitance – 15 1.4 pF
Input Common-Mode Voltage Range – 15 13.5 – V
– 5 3.5 – V
Common-Mode Rejection Ratio TMIN – TMAX – 5, – 15 57 65 dB
Differential Common-Mode Rejection Ratio TMIN – TMAX – 5, – 15 80 100 dB
OUTPUT CHARACTERISTICS
Voltage Swing Single Ended, RLOAD = 25 W – 15 11.0 11.7 – V
– 5 1.1 1.8 – V
Differential, RLOAD = 50 W – 15 21 23 – V
TMIN – TMAX – 15 22.5 24.5 – V
Output Current1, 2
VR, Y RLOAD = 5 W – 15 500 750 mA
– 5 350 400 mA
RB-24 RLOAD = 10 W – 15 400 500 mA
Short Circuit Current – 15 1.0 A
Output Resistance – 15 13 W
MATCHING CHARACTERISTICS
Crosstalk f = 1 MHz – 15 –65 dB
POWER SUPPLY
Operating Range3 TMIN – TMAX – 18 V
Quiescent Current – 5 23 30 mA
– 15 30 40 mA
TMIN – TMAX – 5 40 mA
– 15 55 mA
Power Supply Rejection Ratio TMIN – TMAX – 5, – 15 –55 –66 dB
NOTES
1Output current is limited in the 24-lead SOIC package to the maximum power dissipation. See absolute maximum ratings and derating curves.
2See Figure 12 for bandwidth, gain, output drive recommended operation range.
3Observe derating curves for maximum junction temperature.
Specifications subject to change without notice.
REV. B–2–
(@ TA = +258C, VS = 615 V dc, RFB = 1 kV and RLOAD = 100 V unless otherwise noted)
AD815
REV. B –3–
MAXIMUM POWER DISSIPATION
The maximum power that can be safely dissipated by the AD815
is limited by the associated rise in junction temperature. The
maximum safe junction temperature for the plastic encapsulated
parts is determined by the glass transition temperature of the
plastic, about 150 ° C. Exceeding this limit temporarily may
cause a shift in parametric performance due to a change in the
stresses exerted on the die by the package. Exceeding a junction
temperature of 175 ° C for an extended period can result in
device failure.
The AD815 has thermal shutdown protection, which guarantees
that the maximum junction temperature of the die remains below a
safe level, even when the output is shorted to ground. Shorting
the output to either power supply will result in device failure.
To ensure proper operation, it is important to observe the
derating curves and refer to the section on power considerations.
It must also be noted that in high (noninverting) gain configurations
(with low values of gain resistor), a high level of input overdrive
can result in a large input error current, which may result in a
significant power dissipation in the input stage. This power
must be included when computing the junction temperature rise
due to total internal power.
AMBIENT TEMPERATURE – 8C
14
7
4
–50 90–40
M
AX
IM
UM
P
OW
ER
D
IS
SI
PA
TI
ON
–
W
at
ts
–30 –20 –10 10 20 30 40 50 60 70 80
13
8
6
5
11
9
12
10
0
TJ = 1508C
3
2
1
0
AD815 AVR, AY
q JA = 418C/W
(STILL AIR = 0FT/MIN)
NO HEAT SINK
q JA = 528C/W
(STILL AIR = 0 FT/MIN)
NO HEAT SINK AD815ARB-24
q JA = 168C/W
SOLDERED DOWN TO
COPPER HEAT SINK
(STILL AIR = 0FT/MIN)
AD815 AVR, AY
Plot of Maximum Power Dissipation vs. Temperature
ABSOLUTE MAXIMUM RATINGS1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . – 18 V Total
Internal Power Dissipation2
Plastic (Y and VR) . . 3.05 Watts (Observe Derating Curves)
Small Outline (RB) . . 2.4 Watts (Observe Derating Curves)
Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . . – VS
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . – 6 V
Output Short Circuit Duration
. . . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curves
Can Only Short to Ground
Storage Temperature Range
Y, VR and RB Package . . . . . . . . . . . . . . . –65° C to +125° C
Operating Temperature Range
AD815A . . . . . . . . . . . . . . . . . . . . . . . . . . . –40 ° C to +85 ° C
Lead Temperature Range (Soldering, 10 sec) . . . . . . . +300 ° C
NOTES
1Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2Specification is for device in free air with 0 ft/min air flow: 15-Lead Through-Hole
and Surface Mount: q JA = 41 ° C/W; 24-Lead Surface Mount: q JA = 52° C/W.
PIN CONFIGURATION
24-Lead Thermally-Enhanced SOIC (RB-24)
TOP VIEW
(Not to Scale)
AD815
13
16
15
14
24
23
22
21
20
19
18
17
12
11
10
9
8
1
2
3
4
7
6
5
NC = NO CONNECT
NC
NC
NC
NC
NC
NC
NC
NC
+IN1
–IN1 –IN2
+IN2
OUT1
–VS
OUT2
+VS
*HEAT TABS ARE CONNECTED TO THE POSITIVE SUPPLY.
THERMAL
HEAT TABS
+VS*
THERMAL
HEAT TABS
+VS*
ORDERING GUIDE
Model Temperature Range Package Description Package Option
AD815ARB-24 –40° C to +85 ° C 24-Lead Thermally Enhanced SOIC RB-24
AD815ARB-24-REEL –40° C to +85 ° C 24-Lead Thermally Enhanced SOIC RB-24
AD815AVR –40° C to +85 ° C 15-Lead Surface Mount DDPAK VR-15
AD815AY –40° C to +85 ° C 15-Lead Through-Hole SIP with Staggered Leads and 90 ° Lead Form Y-15
AD815AYS –40° C to +85 ° C 15-Lead Through-Hole SIP with Staggered Leads and Straight Lead Form YS-15
AD815-EB Evaluation Board
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD815 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
AD815
REV. B–4–
AD815–Typical Performance Characteristics
JUNCTION TEMPERATURE – 8C
–40 100–20 0 20 40 60 80
36
34
18
SU
PP
LY
C
UR
RE
NT
–
m
A
26
24
22
20
30
28
32
VS = 615V
VS = 65V
Figure 4. Total Supply Current vs. Temperature
SUPPLY VOLTAGE – 6Volts
33
30
18
0 162
TO
TA
L
SU
PP
LY
C
UR
RE
NT
–
m
A
4 6 8 10 12 14
27
24
21
TA = +258C
Figure 5. Total Supply Current vs. Supply Voltage
JUNCTION TEMPERATURE – 8C
–40 100–20 0 20 40 60 80
10
0
–80
IN
PU
T
BI
AS
C
UR
RE
NT
–
m
A
–40
–50
–60
–70
–20
–30
–10
SIDE B
SIDE A
SIDE A, B
+IB
–IB
–IBSIDE A
SIDE B
VS = 615V, 65V
VS = 65V
VS = 615V
Figure 6. Input Bias Current vs. Temperature
SUPPLY VOLTAGE – 6Volts
20
15
0
0 205
CO
M
M
ON
-M
OD
E
VO
LT
AG
E
RA
NG
E
–
6
Vo
lts
10 15
10
5
Figure 1. Input Common-Mode Voltage Range vs. Supply
Voltage
SUPPLY VOLTAGE – 6Volts
40
30
0
0 205 10 15
20
10
80
60
0
40
20
NO LOAD
RL = 50V
(DIFFERENTIAL)
RL = 25V
(SINGLE-ENDED)
SI
NG
LE
-E
ND
ED
O
UT
PU
T
VO
LT
AG
E
–
V
p-
p
DI
FF
ER
EN
TI
AL
O
UT
PU
T
VO
LT
AG
E
–
V
p-
p
Figure 2. Output Voltage Swing vs. Supply Voltage
LOAD RESISTANCE – (Differential – V) (Single-Ended – V/2)
30
25
0
10 10k100 1k
20
15
10
5
DI
FF
ER
EN
TI
AL
O
UT
PU
T
VO
LT
AG
E
–
Vo
lts
p
-p
60
50
0
40
30
20
10
VS = 615V
VS = 65V
SI
NG
LE
-E
ND
ED
O
UT
PU
T
VO
LT
AG
E
–
Vo
lts
p
-p
Figure 3. Output Voltage Swing vs. Load Resistance
AD815
REV. B –5–
JUNCTION TEMPERATURE – 8C
0
–14
–40 100–20
IN
PU
T
O
FF
SE
T
VO
LT
AG
E
–
m
V
0 20 40 60 80
–2
–6
–8
–10
–12
–4
VS = 65V
VS = 615V
Figure 7. Input Offset Voltage vs. Temperature
JUNCTION TEMPERATURE – 8C
750
600
450
–60 140–40
SH
O
RT
C
IR
CU
IT
C
UR
RE
NT
–
m
A
–20 0 20 40 60 80 100 120
700
650
550
500
VS = 615V
SINK
SOURCE
Figure 8. Short Circuit Current vs. Temperature
VOUT – Volts
15
0
–15
–20 20–16 –12 –8 –4 0 4 8 12 16
10
5
–5
–10
VS = 610V
VS = 65V
RT
I O
FF
SE
T
–
m
V
VS = 615V
TA = 258C
RL = 25V
1kV 1kV
RL =
25V
VOUT
1/2
AD815100V
49.9V
VI N
f = 0.1Hz
Figure 9. Gain Nonlinearity vs. Output Voltage
LOAD CURRENT – Amps
80
0
–60
40
20
–20
–40
60
–2.0 2.0–1.6 –1.2 –0.8 –0.4 0 0.4 0.8 1.2 1.6
VS =
610V
VS =
65V
RT
I O
FF
SE
T
–
m
V
VS =
615V
TA = 258C
1kV 1kV
RL =
5V
VOUT
1/2
AD815100V
49.9V
VI N
f = 0.1Hz
Figure 10. Thermal Nonlinearity vs. Output Current Drive
FREQUENCY – Hz
100
30k 300M100k
CL
OS
ED
-L
OO
P
OU
TP
UT
R
ES
IS
TA
NC
E
–
V
1M 10M 100M
10
1
0.1
0.01
300k 3M 30M
VS = 65V
VS = 615V
Figure 11. Closed-Loop Output Resistance vs. Frequency
FREQUENCY – MHz
40
0
0 146
DI
FF
ER
EN
TI
AL
O
UT
PU
T
VO
LT
AG
E
–
V
p-
p
10
30
20
10
RL = 50V
RL = 25V
RL = 1V
2 4 8 12
RL = 100V
TA = 258C
VS = ±15V
Figure 12. Large Signal Frequency Response
AD815
REV. B–6–
FREQUENCY – Hz
100
10
1
10 100k100 1k 10k
VO
LT
AG
E
NO
IS
E
–
nV
/Ö
H
z
100
10
1
CU
RR
EN
T
NO
IS
E
–
pA
/Ö
H
z
INVERTING INPUT
CURRENT NOISE
NONINVERTING INPUT
CURRENT NOISE
INPUT VOLTAGE
NOISE
Figure 13. Input Current and Voltage Noise vs. Frequency
FREQUENCY – Hz
90
80
10
10k 100M100k
CO
M
M
O
N-
M
O
DE
R
EJ
EC
TI
O
N
–
dB
1M 10M
70
60
50
40
30
20
VS = 615V
SIDE A
SIDE B
562V
562V
562V
562V
VOUTVIN
1/2
AD815
Figure 14. Common-Mode Rejection vs. Frequency
FREQUENCY – MHz
0.01
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
0.1
PS
RR
–
d
B
1 10 100 300
–PSRR
+PSRR
VS = 615V
G = +2
RL = 100V
Figure 15. Power Supply Rejection vs. Frequency
FREQUENCY – Hz
100 100M1k
TR
A
N
SI
M
PE
DA
NC
E
–
dB
10k 100k 1M 10M
120
110
100
90
80
70
60
50
40
30
PH
A
SE
–
D
eg
re
es
100
500
0
–50
–100
–150
–200
–250
TRANSIMPEDANCE
PHASE
Figure 16. Open-Loop Transimpedance vs. Frequency
FREQUENCY – Hz
–40
–50
–110
100 10M1k
TO
TA
L
HA
RM
O
NI
C
DI
ST
O
RT
IO
N
–
dB
c
10k 100k 1M
–60
–70
–80
–90
–100
VS = 615V
G = +10
VOUT = 40V p-p
RL = 50V
(DIFFERENTIAL)
RL = 200V
(DIFFERENTIAL)
Figure 17. Total Harmonic Distortion vs. Frequency
SETTLING TIME – ns
10
–10
8
2
–2
–6
–8
6
4
0
–4
60
O
UT
PU
T
SW
IN
G
F
RO
M
±
V
TO
0
–
V
ol
ts
40 80 100
GAIN = +2
VS = 615V
1%
0.1%
0 20 70
1% 0.1%
Figure 18. Output Swing and Error vs. Settling Time
AD815
REV. B –7–
OUTPUT STEP SIZE – V p-p
700
0
600
500
400
300
200
100
0 255 10 15 20
SI
NG
LE
-E
ND
ED
S
LE
W
R
AT
E
–
V/
m
s
(P
ER
A
MP
LI
FI
ER
)
G = +2
G = +10
1400
0
1200
1000
800
600
400
200 D
IF
FE
RE
NT
IA
L
SL
EW
R
AT
E
–
V/
m
s
Figure 19. Slew Rate vs. Output Step Size
JUNCTION TEMPERATURE – 8C
–85
–80
–60
–40 100–20
PS
RR
–
d
B
0 20 40 60 80
–75
–70
–65
+PSRR
–PSRR
SIDE B
SIDE A
SIDE B
SIDE A
VS = 615V
Figure 20. PSRR vs. Temperature
JUNCTION TEMPERATURE – 8C
–40 100–20 0 20 40 60 80
–74
–66
CM
RR
–
d
B
–73
–70
–69
–68
–67
–72
–71
–CMRR
+CMRR
Figure 21. CMRR vs. Temperature
JUNCTION TEMPERATURE – 8C
5
4
0
–40 100–20
O
PE
N-
LO
O
P
TR
AN
SR
ES
IS
TA
NC
E
–
M
V
0 20 40 60 80
3
2
1
+TZ
SIDE ASIDE B
SIDE A
SIDE B
–TZ
Figure 22. Open-Loop Transresistance vs. Temperature
JUNCTION TEMPERATURE – 8C
15
14
10
–40 100–20
O
UT
PU
T
SW
IN
G
–
V
ol
ts
0 20 40 60 80
13
12
11
VS = 615V
| –VOUT |
+VOUT
+VOUT
| –VOUT |
RL = 150V
RL = 25V
Figure 23. Single-Ended Output Swing vs. Temperature
JUNCTION TEMPERATURE – 8C
27
26
22
25
24
23
–40 100–20
OU
TP
UT
S
W
IN
G
–
Vo
lts
0 20 40 60 80
VS = 615V
RL = 50V
–VOUT
+VOUT
Figure 24. Differential Output Swing vs. Temperature
AD815
REV. B–8–
0.04
0.03
0.02
0.01
0.00
–0.01
–0.02
–0.03
–0.04
DI
FF
G
AI
N
–
%
0.12
0.10
0.08
0.06
0.04
0.02
0.00
–0.02
–0.04
DI
FF
P
HA
SE
–
D
eg
re
es
G = +2
RF = 1kV
NTSC
1 2 3 4 5 6 7 8 9 10 11
0.5
0.4
0.3
0.2
0.1
0.0
–0.1
–0.2
–0.3
GAIN
PHASE
0.005
0.000
–0.005
–0.010
–0.015
–0.020
–0.025
–0.030
0.010
DI
FF
G
AI
N
–
%
DI
FF
P
HA
SE
–
D
eg
re
es
1 2 3 4 5 6 7 8 9 10 11
6 BACK TERMINATED LOADS (25V)
2 BACK TERMINATED LOADS (75V)
G = +2
RF = 1kV
NTSC
GAIN
PHASE
GAIN
PHASE
Figure 25. Differential Gain and Differential Phase
(per Amplifier)
FREQUENCY – MHz
0.03
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
0.1
CR
OS
ST
AL
K
–
dB
1 10 100 300
SIDE B
SIDE A
G = +2
RF = 499V
VS = 615V, 65V
VIN = 400mVrms
RL = 100V
–110
Figure 26. Output-to-Output Crosstalk vs. Frequency
FREQUENCY – MHz
1
0
–1
–2
–3
–4
–5
–6
–7
–9
2
0.1 3001
O
UT
PU
T
VO
LT
AG
E
–
dB
10 100
SIDE B
SIDE A
562V 100V
100V
49.9V
VOUT
VIN
VS = 615V
VIN = 0 dBm
Figure 27. –3 dB Bandwidth vs. Frequency, G = +1
FREQUENCY – MHz
0.1
0
0.1 3001
NO
RM
AL
IZ
ED
F
LA
TN
ES
S
– d
B
10 100
615V
65V
499V 100V
100V
49.9V
VOUT
VIN
499V
A
B
A
B
615V
65V
–0.1
–0.2
–0.3
–0.4
–0.5
–0.6
–0.7
1
0
–1
–2
–3
–4
–5
–6
–7
–8
–9
NO
RM
AL
IZ
ED
F
RE
QU
EN
CY
R
ES
PO
NS
E
– d
B
Figure 28. Bandwidth vs. Frequency, G = +2
FREQUENCY – MHz
0
0.1 3001
NO
RM
AL
IZ
ED
O
UT
PU
T
VO
LT
AG
E
–
dB
10 100
499V 100V
100V VOUT
VIN
124V
SIDE A
SIDE B
–1
–2
–3
–4
–5
–6
–7
1
VS = 615V
49.9V
Figure 29. –3 dB Bandwidth vs. Frequency, G = +5
10
0%
100
90
1ms5V
Figure 30. 40 V p-p Differential Sine Wave, RL = 50 W ,
f = 100 kHz
AD815
REV. B –9–
1/2 AD815
0.1mF
10mF+15V
562V
0.1mF
10mF
7
–15V
RL = 100V
100V
50V
VIN
PULSE
GENERATOR
TR/TF = 250ps
8
Figure 31. Test Circuit, Gain = +1
100mV 20ns
SIDE B
SIDE A
G = +1
RF = 698V
RL = 100V
Figure 32. 500 mV Step Response, G = +1
1V 20ns
SIDE B
SIDE A
G = +1
RF = 562V
RL = 100V
Figure 33. 4 V Step Response, G = +1
2V 50ns
SIDE B
SIDE A
G = +1
RF = 562V
RL = 100V
Figure 34. 10 V Step Response, G = +1
1/2 AD815
8
0.1mF
10mF+15V
0.1mF
10mF
7
–15V
RL = 100V
100V
50V
VIN
PULSE
GENERATOR
TR/TF = 250ps
RS
RF
Figure 35. Test Circuit, Gain = 1 + RF /RS
5V 100ns
SIDE B
SIDE A
G = +5
RF = 562V
RL = 100V
RS = 140V
Figure 36. 20 V Step Response, G = +5
1/2 AD815
8
0.1mF
10mF+15V
0.1mF
10mF
7
–15V
RL = 100V
100V
55V
VIN
PULSE
GENERATOR
TR/TF = 250ps
562V
562V
Figure 37. Test Circuit, Gain = –1
100mV 20ns
SIDE B
SIDE A
G = –1
RF = 562V
RL = 100V
Figure 38. 500 mV Step Response, G = –1
AD815
REV. B–10–
Choice of Feedback and Gain Resistors
The fine scale gain flatness will, to some extent, vary with
feedback resistance. It therefore is recommended that once
optimum resistor values have been determined, 1% tolerance
values should be used if it is desired to maintain flatness over
a wide range of production lots. Table I shows optimum values
for several useful configurations. These should be used as
starting point in any application.
Table I. Resistor Values
RF (V) RG (V)
G = +1 562 ‘
–1 499 499
+2 499 499
+5 499 125
+10 1 k 110
PRINTED CIRCUIT BOARD LAYOUT
CONSIDERATIONS
As to be expected for a wideband amplifier, PC board parasitics
can affect the overall closed-loop performance. Of concern are
stray capacitances at the output and the inverting input nodes. If
a ground plane is to be u
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