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DLP-2232M-G;中文规格书,Datasheet资料

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DLP-2232M-G;中文规格书,Datasheet资料Rev1.6(May2009)DLP-2232M-GDLPDesign,Inc.1DLP-2232M-GMODULE/EVALUATIONKIT*LEAD-FREE*1.0IntroductionTheDLP-2232M-GutilizesFTDI'sthird-generationUSBUART/FIFOI.C.,theFT2232D.Thislow-costdevelopmenttoolfeaturestwoMulti-PurposeUART/FIFOcontrollersthatcanbeconfig...

DLP-2232M-G;中文规格书,Datasheet资料
Rev1.6(May2009)DLP-2232M-GDLPDesign,Inc.1DLP-2232M-GMODULE/EVALUATIONKIT*LEAD-FREE*1.0IntroductionTheDLP-2232M-GutilizesFTDI'sthird-generationUSBUART/FIFOI.C.,theFT2232D.Thislow-costdevelopmenttoolfeaturestwoMulti-PurposeUART/FIFOcontrollersthatcanbeconfiguredindividuallyinseveraldifferentmodes.InadditiontotheUARTinterface,FIFOinterface,andBit-BangIOmodesofthesecond-generationFT232BMandFT245BMdevices,theFT2232DoffersavarietyofadditionalmodesofoperationincludingaMulti-ProtocolSynchronousSerialEngineinterfacedesignedspecificallyforsynchronousserialprotocolssuchasJTAGandSPIbus.TheDLP-2232M-Gfeaturesaqualityfour-layerprintedcircuitboardwithasolidgroundplane,anintegral93C56EEPROMonboardforeasyOEMcustomizationandastandard40-pin,0.6inwidefootprint.Integralpowercontrolandon-boardMOSFETpowerswitchmaketheDLP-2232M-GaperfectchoiceforUSBbus-powered,high-powerdesignsaswellasself-andlow-poweredproducts.http://oneic.com/Rev1.6(May2009)DLP-2232M-GDLPDesign,Inc.21.1FeaturesSummary•Singleboard,USBDualChannelSerial/ParallelPortswithavarietyofconfigurations•EntireUSBprotocolhandledon-board.NoUSB-specificfirmwareprogrammingrequired•DLP-USB232M-styleUARTinterfaceoptionwithfullHandshaking&Modeminterfacesignals•UARTInterfacesupports7/8bitdata,1/2stopbits,andOdd/Even/Mark/Space/NoParity•TransferDataRate300to1MegaBaud(RS232)•TransferDataRate300to3MegaBaud(TTLandRS422/RS485)•AutoTransmitEnablecontrolforRS485serialapplicationsusingTXDENpin•DLP-USB245M-styleFIFOinterfaceoptionwithbi-directionaldatabusandsimple4-wirehandshakeinterface•TransferDataRateupto1MegaByte/Second•EnhancedBit-BangModeinterfaceoption•NewSynchronousBit-BangModeinterfaceoption•NewCPU-StyleFIFOInterfaceModeoption•NewMulti-ProtocolSynchronousSerialEngine(MPSSE)interfaceoption•NewMCUHostBusEmulationModeoption•NewFastOpto-IsolatedSerialInterfaceModeoption•InterfacemodeandUSBDescriptionstringsconfigurableinon-boardEEPROM•EEPROMConfigurablein-circuitviaUSB•SupportforUSBSuspendandResumeconditionsviaPWREN#,andSI/WUxpins•Supportforbuspowered,selfpowered,andhigh-powerbuspoweredUSBconfigurations•IntegratedPower-On-Resetcircuit,withoptionalResetinputandResetOutputpins•5Vand3.3VlogicIOInterfacingwithindependentlevelconversiononeachchannel•USBBulkorIsochronousdatatransfermodes•4.35Vto5.25Vsinglesupplyoperatingvoltagerange•UHCI/OHCI/EHCIhostcontrollercompatible•USB2.0FullSpeed(12Mbits/Second)compatible•Standard40-pin,0.6inwidefootprintVIRTUALCOMPORT(VCP)DRIVERSAPPLICATIONAREAS•Windows98/98SE/2000/ME/XP•USBDualPortRS232Converters•WindowsCE**•USBDualPortRS422/RS485•MACOS-8andOS-9**•UpgradingLegacyPeripheralDesigns•MACOS-X**•USBInstrumentation•Linux2.40andgreater**•USBJTAGProgramming[**=Inplanningorunderdevelopment]•USBtoSPIBusInterfaces•USBIndustrialControlD2XX(DirectDrivers+DLLS/W•FieldUpgradeableUSBProducts•Windows98/98SE/2000/ME/XP•GalvanicallyIsolatedProductsWithUSBInterfacehttp://oneic.com/Rev1.6(May2009)DLP-2232M-GDLPDesign,Inc.31.2GeneralDescriptionTheDLP-2232M-GmoduleisaUSBinterfacethatincorporatesthefunctionalityoftwoDLP-USB2xxMmodulesintoasingle40-pinmodule.AsingledownstreamUSBportisconvertedtotwoIOchannelsthatcaneachbeindividuallyconfiguredasaDLP-USB232M-styleUARTinterface,oraDLP-USB245M-styleFIFOinterface,withouttheneedtoaddaUSBhub.TherearealsoseveralnewmodeswhichcanbeenabledintheexternalEEPROM,orbyusingDLLdrivercommands.TheseincludeSynchronousBit-BangMode,aCPU-StyleFIFOInterfaceMode,aMulti-ProtocolSynchronousSerialEngineInterfaceMode,MCUHostBusEmulationMode,andFastOpto-IsolatedSerialInterfaceMode.Additionally,anewhighoutputdriveleveloptionmeansthatthedeviceUART/FIFOIOpinswilldriveoutataroundthreetimesthenormalpowerlevel,allowingthedatabustobesharedbyseveraldevices.ClassicBM-styleAsynchronousBit-BangModeisalsosupported,buthasbeenenhancedtogivetheuseraccesstothedevice’sinternalRD#andWR#strobes.FTDIprovidesaroyaltyfreeVirtualComPort(VCP)driverthatmakestheperipheralportslooklikeastandardCOMporttothePC.MostexistingsoftwareapplicationsshouldbeableinterfacewiththeVirtualComPortsimplybyreconfiguringthemtousethenewportscreatedbythedriver.UsingtheVCPdrivers,anapplicationprogrammerwouldcommunicatewiththedeviceinexactlythesamewayastheywouldaregularPCCOMport-usingtheWindowsVCOMMAPIcallsoraCOMportlibrary.TheFT2232DdriveralsoincorporatesthefunctionsdefinedforFTDI’sD2XXdrivers,allowingapplicationsprogrammerstointerfacesoftwaredirectlytothedeviceusingaWindowsDLL.http://oneic.com/Rev1.6(May2009)DLP-2232M-GDLPDesign,Inc.42.0FeaturesandEnhancementsTheDLP-2232M-GincorporatesalloftheenhancementsintroducedforthesecondgenerationDLP-USB232MandDLP-USB245Mmodules,summarizedhere:•TwoIndividuallyConfigurableIOChannelsEachoftheDLP-2232M-G’sChannels(AandB)canbeindividuallyconfiguredasaDLP-USB232M-styleUARTinterface,orasaDL-USB245M-styleFIFOinterface.Additionally,thesechannelscanbeconfiguredinanumberofspecialIOmodes.•IntegratedPower-On-Reset(POR)circuitThemoduleincorporatesaninternalPORfunction.ARESET#pinisavailabletoallowexternallogictoresetthemodulewhererequired,howeverformostapplicationsthispincansimplybeleftdisconnectedastheRESETinputtotheFT2232DispulledtoVCCthrougha47Kresistor.ARSTOUT#pinisprovidedinordertoallowthenewPORcircuittoprovideastableresettoexternalMCUandotherdevices.•IntegratedlevelconverteronUART/FIFOinterfaceandcontrolsignalsEachchanneloftheDLP-2232M-GhasitsownindependentVCCIOpinthatcanbesuppliedbybetween3Vto5V.Thisallowseachchannel’soutputvoltagedriveleveltobeindividuallyconfigured.Thusallowing,forexample,3.3VlogictobeinterfacedtothedevicewithouttheneedforexternallevelconverterI.C.’s.•Improvedpowermanagementcontrolforhigh-powerUSBBusPowereddevicesThePWREN#pinoftheFT2232DdirectlydrivesaP-ChannelMOSFETforapplicationswherepowerswitchingofexternalcircuitryisrequired.TheBMpulldownenablefeature(configuredintheexternalEEPROM)isalsoretained.ThiswillmakethemodulegentlypulldownontheFIFO/UARTIOlineswhenthepowerisshutoff(PWREN#ishigh).Inthismode,anyresidualvoltageonexternalcircuitryisbledtoGNDwhenpowerisremoved,thusensuringthatexternalcircuitrycontrolledbyPWREN#resetsreliablywhenpowerisrestored.•SupportforIsochronousUSBTransfersWhilstUSBBulktransferisusuallythebestchoicefordatatransfer,theschedulingtimeofthedataisnotguaranteed.Forapplicationswhereschedulinglatencytakespriorityoverdataintegritysuchastransferringaudioandlowbandwidthvideodata,theDLP-2232M-GofferstheoptionofUSBIsochronoustransferviaconfigurationofbitintheEEPROM.•SendImmediate/WakeUpSignalPinoneachchannelThereisaSendImmediate/WakeUp(SI/WU)signalpinoneachofthetwochannels.Thesecombinetwofunctionsononepin.IfUSBisinsuspendmode(andremotewakeupisenabledintheEEPROM),strobingthispinlowwillcausethedevicetorequestaresumefromsuspend(WakeUp)ontheUSBBus.Normally,thiscanbeusedtowakeuptheHostPC.Duringnormaloperation,ifthispinisstrobedlowanydatainthedeviceRXbufferwillbesentoutoverUSBonthenextBulk-INrequestfromthehttp://oneic.com/Rev1.6(May2009)DLP-2232M-GDLPDesign,Inc.5driversregardlessofthepacketsize.ThiscanbeusedtooptimizeUSBtransferspeedforapplicationsthatsendsmallpacketsofdatatothehostPC.•ProgrammableReceiveBufferTimeoutTheTXbuffertimeoutisprogrammableoverUSBin1msincrementsfrom1msto255ms,thusallowingthemoduletobebetteroptimizedforprotocolsrequiringfasterresponsetimesfromshortdatapackets.•BaudRatePre-ScalerDivisorsTheDLP-2232M-G(UARTmode)baudratepre-scalersupportsdivisionby(n+0),(n+0.125),(n+0.25),(n+0.375),(n+0.5),(n+0.625),(n+0.75)and(n+0.875)wherenisanintegerbetween2and16,384.•USB2.0(fullspeedoption)AnEEPROMbasedoptionallowstheDLP-2232M-GtoreturnaUSB2.0devicedescriptorasopposedtoUSB1.1.Note:ThedevicewouldbeaUSB2.0FullSpeeddevice(12Mb/s)asopposedtoaUSB2.0HighSpeeddevice(480Mb/s).FormoredetailsonthesefeaturespleaseseetheFT232BMandFT245BMdatasheetsandapplicationnotes.InadditiontotheDLP-USB2xxMmodulefeatures,theDLP-2232M-Gincorporatesthefollowingnewfeaturesandinterfacemodes:•EnhancedAsynchronousBit-BangInterfaceTheDLP-2232M-GsupportsFTDI’sBMchipBitBangmode.InBitBangmode,theeightFIFOdatalinescanbeswitchedbetweenFIFOinterfacemodeandan8-bitParallelIOport.Datapacketscanbesenttothedeviceandtheywillbesequentiallysenttotheinterfaceataratecontrolledbyaninternaltimer(equivalenttothebaudrateprescaler).WiththeDLP-2232M-Gmodule,thismodehasbeenenhancedsothattheinternalRD#andWR#strobesarenowbroughtoutofthedevicewhichcanbeusedtoallowexternallogictobeclockedbyaccessestotheBit-BangIObus.•SynchronousBit-BangInterfaceWithSynchronousBit-BangMode,thedeviceisonlyreadwhenitiswrittento,asopposedtoasynchronouslybythedatarategenerator.Thismakesiteasierforthecontrollingprogramtomeasuretheresponsetoanoutputstimulus,asthedatareturnedissynchronoustotheoutputdata.•HighOutputDriveLevelCapabilityTheIOinterfacepinscanbemadetodriveoutat12mA,insteadofthenormal4mAallowingmultipledevicestobeinterfacedtothebus.http://oneic.com/Rev1.6(May2009)DLP-2232M-GDLPDesign,Inc.6•CPU-StyleFIFOInterfaceTheCPUstyleFIFOinterfaceisessentiallythesamefunctionastheclassicFT245interface,howeverthebussignalshavebeenredefinedtomakethemeasiertointerfacetoaCPUbus.•Multi-ProtocolSynchronousSerialEngineInterface(M.P.S.S.E.)TheMulti-ProtocolSynchronousSerialEngine(MPSSE)interfaceisanewoptiondesignedtointerfaceefficientlywithsynchronousserialprotocolssuchasJTAGandSPIBus.Itisveryflexibleinthatitcanbeconfiguredfordifferentindustrystandards,orproprietarybusprotocols.Forinstance,itispossibletoconnectoneoftheDLP-2232M-G’schannelstoanSRAMconfigurableFPGAassuppliedbyvendorssuchasAlteraandXilinx.TheFPGAdevicewouldnormallybeun-configured(i.e.havenodefinedfunction)atpower-up.ApplicationsoftwareonthePCcouldusetheMPSSEtodownloadconfigurationdatatotheFPGAoverUSB.Thisdatawoulddefinethehardware’sfunctionandthen,aftertheFPGAdeviceisconfigured,theDLP-2232M-GcanswitchbackintoFIFOinterfacemodetoallowtheprogrammedFPGAdevicetocommunicatewiththePCoverUSB.TheotherDLP-2232M-Gchannelwouldalsobeavailableforotherdevices.Thisapproachwouldallowacustomertocreatea“generic”USBperipheral;who’shardwarefunctioncanbedefinedundercontroloftheapplicationsoftware.TheFPGAbasedhardwarecouldbeeasilyupgradedortotallychangedsimplybychangingtheFPGAconfigurationdatafile.(SeetheFTDIMORPH-ICorDLP-DesignDLP-2232PBandDLP-2232SYdevelopmentmodulesforpracticalexamples)•MCUHostBusEmulationThisnewmodecombinesthe‘A’and‘B’businterfacetomaketheDLP-2232M-Ginterfaceemulateastandard8048/8051styleMCUbus.ThisallowsperipheraldevicesfortheseMCUfamiliestobedirectlyattachedtotheDLP-2232M-GwithIObeingperformedoverUSBwiththehelpofMPSSEinterfacetechnology.•FastOpto-IsolatedSerialInterfaceAnewproprietaryFTDIprotocolisdesignedtoallowgalvanicallyisolateddevicestocommunicatesynchronouslywiththeDLP-2232M-Gusingjust4wires(twodualopto-isolators).Theperipheralcircuitrycontrolsthedatatransferrateinbothdirections,whilstmaintainingfulldataintegrity.MaximumUSBfullspeeddataratescanbeachieved.Both‘A’and‘B’channelscancommunicateoverthesame4-wireinterfaceifdesired.http://oneic.com/Rev1.6(May2009)DLP-2232M-GDLPDesign,Inc.73.0DLP-2232M-GModuleSimplifiedBlockDiagramPWREN#DP,DM3.3VoltLDOFT2232CChannelAMulti-purposeUART/FIFOControllerChannelBMulti-purposeUART/FIFOController93C56EEPROM6MHzResonator40Pin,.6inchHeaderUSBType'B'connectortoHostPC/MacMOSFETPowerSwitch3.1FunctionalBlockDescriptions•6MHzOscillatorThe6MHzOscillatorcellgeneratesa6MHzreferenceclockinputtothex8Clockmultiplierfromanexternal6MHzceramicresonator.•Multi-PurposeUART/FIFOControllersTheMulti-purposeUART/FIFOcontrollershandlethetransferofdatabetweentheDualPortRXandTXbuffersandtheUART/FIFOtransmitandreceiveregisters.WhenconfiguredasaUARTitperformsasynchronous7/8bitparalleltoserialandserialtoparallelconversionofthedataontheRS232(RS422andRS485)interface.ControlsignalssupportedbyUARTmodeincludeRTS,CTS,DSR,DTR,DCDandRI.Therearealsotransmitterenablecontrolsignalpins(TXDEN)providedtoassistwithinterfacingtoRS485transceivers.RTS/CTS,DSR/DTRandX-On/X-Offhandshakingoptionsarealsosupported.Handshaking,whererequired,ishandledinhardwaretohttp://oneic.com/Rev1.6(May2009)DLP-2232M-GDLPDesign,Inc.8ensurefastresponsetimes.TheUARTsalsosupporttheRS232BREAKsettinganddetectionconditions.•EEPROMInterfaceTheon-board93C56EEPROMallowseachoftheDLP-2232M-Gmodule’schannelstobeindependentlyconfiguredasaserialUART(232mode),oraparallelFIFO(245mode).TheEEPROMisusedtoenabletheCPU-styleFIFOinterface,andFastOpto-IsolatedSerialinterfacemodes.Thedrivertypeselection(VCPorD2XX)isalsostoredintheEEPROM.TheEEPROMcanalsobeusedtocustomizetheUSBVID,PID,SerialNumber,ProductDescriptionStringsandPowerDescriptorvalueoftheDLP-2232M-GforOEMapplications.OtherparameterscontrolledbytheEEPROMincludeRemoteWakeUp,IsochronousTransferMode,SoftPullDownonPower-OffandUSB2.0descriptormodes.TheEEPROMisprogrammablein-circuitviaUSBusingtheMPROGutilityprogramavailablefrombothwww.dlpdesign.comandFTDI’swebsite(www.ftdichip.com).http://oneic.com/Rev1.6(May2009)DLP-2232M-GDLPDesign,Inc.94.0ModulePin-Out40Pin,.6inchHeaderUSB'B'TypeConnector1202140FT2232C6.000Figure2.Pin-Out(40PinDIPHeader)4.1PinDefinitionsThissectiondescribestheoperationoftheDLP-2232M-Gpins.CommonpinsaredefinedinthefirstsectionandtheI/Opinsaredefinedbychipmode.MoredetaileddescriptionsoftheoperationoftheI/Opinsareprovidedinsectionx.(was9)4.2CommonPinsTheoperationofthefollowingDLP-2232M-Gpinsstaythesame,regardlessoftheoperatingmode.Pin#SignalTypeDescription27RSTIN#InputCanbeusedbyanexternaldevicetoresettheFT2232D.Ifnotrequired,canbeleftdisconnected.26RSTOUT#OutputOutputoftheinternalResetGenerator.Stayshighimpedancefor~5msafterVCC>3.5Vandtheinternalclockstartsup,thenclampsit’soutputtothe3.3Voutputoftheinternalregulator.TakingRESET#lowwillalsoforceRSTOUT#todrivelow.RSTOUT#isNOTaffectedbyaUSBBusReset.19EXTVCCPWR+4.35to+5.25voltVCCtothedevicecore,LDOandnon-http://oneic.com/Rev1.6(May2009)DLP-2232M-GDLPDesign,Inc.10UART/FIFOcontrollerinterfacepins.DeviceAnalogPowerSupplyfortheinternalx8clockmultiplier.18VCCIOAPWR+3.0to+5.25voltVCCtotheUART/FIFOChannelAinterfacepins.Wheninterfacingwith3.3VexternallogicconnectVCCIOtothe3.3Vsupplyoftheexternallogic,otherwiseconnecttoVCCtodriveoutat5VCMOSlevel.17VCCIOBPWR+3.0voltto+5.25voltVCCtotheUART/FIFOChannelBinterfacepins.Wheninterfacingwith3.3VexternallogicconnectVCCIOtothe3.3Vsupplyoftheexternallogic,otherwiseconnecttoVCCtodriveoutat5VCMOSlevel.20PORTVCCPWRPowerfromUSBport.ConnecttoEXTVCCifmoduleistobepoweredbytheUSBport(typicalconfiguration).500mAmaximumcurrentavailabletoUSBadapterandtargetelectronicsifUSBdeviceisconfiguredforhighpower.16VCCSWPWROutputoftheMOSFETpowerswitch,activatedafterenumeration.21VCCUSBPWRFiltered+3.0voltto+5.25voltEXTVCCfromeitherthehostUSBportorusersuppliedexternalpowersupply.4.3IOPinDefinitionsbyChipModeThedefinitionofthefollowingpinsvaryaccordingtothemodule’smode:Pin#GenericPinNamePinDefinitionsbyChipMode*Note2232UARTMode245FIFOModeCPUFIFOInterfaceModeEnhancedAsynchronousandSynchronousBit-BangModesMPSSE*Note4MCUHostBusEnumerationMode*Note5FastOpto-IsolatedSerialMode40ADBUS0TXDD0D0D0TCK/SKAD0*Note339ADBUS1RXDD1D1D1TDI/DUAD138ADBUS2RTS#D2D2D2TDO/D1AD237ADBUS3CTS#D3D3D3TMS/CSAD336ADBUS4DTR#D4D4D4GPIOL0AD435ADBUS5DSR#D5D5D5GPIOL1AD534ADBUS6DCD#D6D6D6GPIOL2AD633ADBUS7RI#D7D7D7GPIOL3AD732ACBUS0TXDENRXF#CS#WR#*Note6GPIOH0I/O031ACBUS1SLEEP#TXE#A0RD#*Note6GPIOH1I/O130ACBUS2RXLED#RD#RD#WR#*Note7GPIOH2IORDY#29ACBUS3TXLED#WRWR#RD#*Note7GPIOH3OSC28SI/WUA???SI/WUASI/WUASI/WUAhttp://oneic.com/分销商库存信息:DLP-DESIGNDLP-2232M-G
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