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24AA256-EMS中文资料24AA256-EMS中文资料©2007MicrochipTechnologyInc.DS21930B-page124AA00/24LC00/24C0024AA01/24LC01B24AA014/24LC01424C01C24AA02/24LC02B24C02C24AA024/24LC02424AA025/24LC02524AA04/24LC04B24AA08/24LC08B24AA16/24LC16B24AA32A/24LC32A24AA64/24LC64/24FC6424AA128/24LC128/24FC12...

24AA256-EMS中文资料
24AA256-EMS中文资料©2007MicrochipTechnologyInc.DS21930B-page124AA00/24LC00/24C0024AA01/24LC01B24AA014/24LC01424C01C24AA02/24LC02B24C02C24AA024/24LC02424AA025/24LC02524AA04/24LC04B24AA08/24LC08B24AA16/24LC16B24AA32A/24LC32A24AA64/24LC64/24FC6424AA128/24LC128/24FC12824AA256/24LC256/24FC25624AA512/24LC512/24FC512Features:•128-bitthrough512Kbitdevices•Singlesupplywithoperationdownto1.7Vfor24AAXXdevices•Low-powerCMOStechnology:-1mAactivecurrent,typical-1μAstandbycurrent,typical(I-temp)•2-wireserialinterfacebus,I2C™compatible•SchmittTriggerinputsfornoisesuppression•Outputslopecontroltoeliminategroundbounce•100kHz(1.7V)and400kHz(≥2.5V)compatibility•1MHzfor24FCXXproducts•Self-timedwritecycle(includingauto-erase)•Pagewritebuffer•Hardwarewrite-protectavailableonmostdevices•Factoryprogramming(QTP)available•ESDprotection>4,000V•1millionerase/writecycles•Dataretention>200years•8-leadPDIP,SOIC,TSSOPandMSOPpackages•5-leadSOT-23package(most1-16Kbitdevices)•8-lead2x3mmand5x6mmDFNpackagesavailable•Pb-freeandRoHScompliant•Availableforextendedtemperatureranges:-Industrial(I):-40°Cto+85°C-Automotive(E):-40°Cto+125°CDescription:TheMicrochipTechnologyInc.24CXX,24LCXX,24AAXXand24FCXX(24XX*)devicesareafamilyof128-bitthrough512KbitElectricallyErasedPROMs.Thedevicesareorganizedinblocksofx8-bitmemorywith2-wireserialinterfaces.Low-voltagedesignpermitsoperationdownto1.7V(for24AAXXdevices),withstandbyandactivecurrentsofonly1μAand1mA,respectively.Devices1Kbitandlargerhavepagewritecapability.Partshavingfunctionaladdresslinesallowconnectionofupto8devicesonthesamebus.The24XXfamilyisavailableinthestandard8-pinPDIP,surfacemountSOIC,TSSOPandMSOPpack-ages.Most128-bitthrough16Kbitdevicesarealsoavailableinthe5-leadSOT-23package.DFNpackages(2x3mmor5x6mm)arealsoavailable.AllpackagesarePb-free(MatteTin)finish.*24XXisusedinthisdocumentasagenericpartnumberfor24seriesdevicesinthisdatasheet.24XX64,forexample,representsallvoltagesofthe64Kbitdevice.PackageTypes(1)A0A1A2VSS12348765VCCWP(3)SCLSDAPDIP/SOICA0A1A2VSS12348765VCCWP(3)SCLSDATSSOP/MSOP(2)1543SCLVSSSDAVCCNC2SOT-23-5(24XX00)SOT-23-51543SCLVSSSDAWPVCC2(allexcept24XX00)A0A1A2VSSWP(3)SCLSDA56784321VCCDFNNote1:PinsA0,A1,A2andWParenotusedbysomedevices(nointernalconnections).SeeTable1-1,DeviceSelectionTable,fordetails.2:PinsA0andA1areno-connectsforthe24XX128and24XX256MSOPdevices.3:Pin7is“notused”for24XX00,24XX025and24C01C.I2C™SerialEEPROMFamilyDataSheet元器件交易网www.cecb2b.comTABLE1-1:DEVICESELECTIONTABLEPartNumberVCCRangeMax.ClockFrequencyPageSizeWrite-ProtectSchemeFunctionalAddressPinsTemp.RangePackages(5)128-bitdevices24AA001.7-5.5V400kHz(1)—NoneNoneIP,SN,ST,OT,MC24LC002.5-5.5V400kHz(1)I24C004.5-5.5V400kHzI,E1Kbdevices24AA011.7-5.5V400kHz(2)8bytesEntireArrayNoneIP,SN,ST,MS,OT,MC24LC01B2.5-5.5V400kHzI,E24AA0141.7-5.5V400kHz(2)16bytesEntireArrayA0,A1,A2IP,SN,ST,MS,MC24LC0142.5-5.5V400kHzI24C01C4.5V-5.5V400kHz16bytesNoneA0,A1,A2I,EP,SN,ST,MC2Kbdevices24AA021.7-5.5V400kHz(2)8bytesEntireArrayNoneIP,SN,ST,MS,OT,MC24LC02B2.5-5.5V400kHzI,E24AA0241.7-5.5V400kHz(2)16bytesEntireArrayA0,A1,A2IP,SN,ST,MS,MC24LC0242.5-5.5V400kHzI24AA0251.7-5.5V400kHz(2)16bytesNoneA0,A1,A2IP,SN,ST,MS,MC24LC0252.5-5.5V400kHzI24C02C4.5-5.5V400kHz16bytesUpperHalfofArrayA0,A1,A2I,EP,SN,ST,MC4Kbdevices24AA041.7-5.5V400kHz(2)16bytesEntireArrayNoneIP,SN,ST,MS,OT,MC24LC04B2.5-5.5V400kHzI,E8Kbdevices24AA081.7-5.5V400kHz(2)16bytesEntireArrayNoneIP,SN,ST,MS,OT,MC24LC08B2.5-5.5V400kHzI,E16Kbdevices24AA161.7-5.5V400kHz(2)16bytesEntireArrayNoneIP,SN,ST,MS,OT,MC24LC16B2.5-5.5V400kHzI,E32Kbdevices24AA32A1.7-5.5V400kHz(2)32bytesEntireArrayA0,A1,A2IP,SN,SM,ST,MS,MC24LC32A2.5-5.5V400kHzI,E64Kbdevices24AA641.7-5.5V400kHz(2)32bytesEntireArrayA0,A1,A2IP,SN,SM,ST,MS,MC24LC642.5-5.5V400kHzI,E24FC641.7-5.5V1MHz(3)INote1:100kHzforVCC<4.5V.2:100kHzforVCC<2.5V.3:400kHzforVCC<2.5V.4:PinsA0andA1areno-connectsforthe24XX128and24XX256intheMSOPpackage.5:P=8-PDIP,SN=8-SOIC(3.90mmJEDEC),ST=8-TSSOP,OT=5or6-SOT23,MC=2x3mmDFN,MS=8-MSOP,SM=8-SOIC(200milEIAJ),MF=5x6mmDFN.128Kbdevices24AA1281.7-5.5V400kHz(2)64bytesEntireArrayA0,A1,A2(4)IP,SN,SM,ST,MS,MF,ST1424LC1282.5-5.5V400kHzI,E24FC1281.7-5.5V1MHz(3)I256Kbdevices24AA2561.7-5.5V400kHz(2)64bytesEntireArrayA0,A1,A2(4)IP,SN,SM,ST,MS,MF,ST1424LC2562.5-5.5V400kHzI,E24FC2561.7-5.5V1MHz(3)I512Kbdevices24AA5121.7-5.5V400kHz(2)128bytesEntireArrayA0,A1,A2IP,SM,MF,ST1424LC5122.5-5.5V400kHzI,E24FC5121.7-5.5V(3)1MHzITABLE1-1:DEVICESELECTIONTABLE(CONTINUED)PartNumberVCCRangeMax.ClockFrequencyPageSizeWrite-ProtectSchemeFunctionalAddressPinsTemp.RangePackages(5)Note1:100kHzforVCC<4.5V.2:100kHzforVCC<2.5V.3:400kHzforVCC<2.5V.4:PinsA0andA1areno-connectsforthe24XX128and24XX256intheMSOPpackage.5:P=8-PDIP,SN=8-SOIC(3.90mmJEDEC),ST=8-TSSOP,OT=5or6-SOT23,MC=2x3mmDFN,MS=8-MSOP,SM=8-SOIC(200milEIAJ),MF=5x6mmDFN.2.0ELECTRICALCHARACTERISTICSAbsoluteMaximumRatings(†)VCC.............................................................................................................................................................................6.5VAllinputsandoutputsw.r.t.VSS.........................................................................................................-0.6VtoVCC+1.0VStoragetemperature...............................................................................................................................-65°Cto+150°CAmbienttemperaturewithpowerapplied................................................................................................-40°Cto+125°CESDprotectiononallpins......................................................................................................................................................≥4kVTABLE2-1:DCCHARACTERISTICS†NOTICE:Stressesabovethoselistedunder“AbsoluteMaximumRatings”maycausepermanentdamagetothedevice.Thisisastressratingonlyandfunctionaloperationofthedeviceatthoseoranyotherconditionsabovethoseindicatedintheoperationallistingsofthisspecificationisnotimplied.Exposuretomaximumratingconditionsforextendedperiodsmayaffectdevicereliability.DCCHARACTERISTICSElectricalCharacteristics:Industrial(I):VCC=+1.7Vto5.5VTA=-40°Cto+85°CAutomotive(E):VCC=+2.5Vto5.5VTA=-40°Cto125°CParam.No.Sym.CharacteristicMin.Max.UnitsConditionsD1—A0,A1,A2,SCL,SDAandWPpins:————D2VIHHigh-levelinputvoltage0.7VCC—V—D3VILLow-levelinputvoltage—0.3VCC0.2VCCVVVCC≥2.5VVCC<2.5VD4VHYSHysteresisofSchmittTriggerinputs(SDA,SCLpins)0.05VCC—V(Note1)D5VOLLow-leveloutputvoltage—0.40VIOL=3.0mA@VCC=2.5VD6ILIInputleakagecurrent—±1μAVIN=VSSorVCCD7ILOOutputleakagecurrent—±1μAVOUT=VSSorVCCD8CIN,COUTPincapacitance(allinputs/outputs)—10pFVCC=5.0V(Note1)TA=25°C,FCLK=1MHzD9ICCReadOperatingcurrent—4001μAmA24XX128,256,512:VCC=5.5V,SCL=400kHzAllexcept24XX128,256,512:VCC=5.5V,SCL=400kHzICCWrite—35mAmAVCC=5.5V,Allexcept24XX512VCC=5.5V,24XX512D10ICCSStandbycurrent—1μATA=-40°Cto+85°CSCL=SDA=VCC=5.5VA0,A1,A2,WP=VSSorVCC—5μATA=-40°Cto125°CSCL=SDA=VCC=5.5VA0,A1,A2,WP=VSSorVCC—50μA24C01Cand24C02ConlySCL=SDA=VCC=5.5VA0,A1,A2,WP=VSSorVCCNote1:Thisparameterisperiodicallysampledandnot100%tested.TABLE2-2:ACCHARACTERISTICS–ALLEXCEPT24XX00,24C01CAND24C02CACCHARACTERISTICSElectricalCharacteristics:Industrial(I):VCC=+1.7Vto5.5VTA=-40°Cto+85°CAutomotive(E):VCC=+2.5Vto5.5VTA=-40°Cto125°CParam.No.Sym.CharacteristicMin.Max.UnitsConditions1FCLKClockfrequency————1004004001000kHz1.7V≤VCC<2.5V2.5V≤VCC≤5.5V1.7V≤VCC<2.5V24FCXXX2.5V≤VCC≤5.5V24FCXXX2THIGHClockhightime4000600600500————ns1.7V≤VCC<2.5V2.5V≤VCC≤5.5V1.7V≤VCC<2.5V24FCXXX2.5V≤VCC≤5.5V24FCXXX3TLOWClocklowtime470013001300500————ns1.7V≤VCC<2.5V2.5V≤VCC≤5.5V1.7V≤VCC<2.5V24FCXXX2.5V≤VCC≤5.5V24FCXXX4TRSDAandSCLrisetime(Note1)———1000300300ns1.7V≤VCC<2.5V2.5V≤VCC≤5.5V1.7V≤VCC≤5.5V24FCXXX5TFSDAandSCLfalltime(Note1)——300100nsAllexcept24FCXXX1.7V≤VCC≤5.5V24FCXXX6THD:STAStartconditionholdtime4000600600250————ns1.7V≤VCC<2.5V2.5V≤VCC≤5.5V1.7V≤VCC<2.5V24FCXXX2.5V≤VCC≤5.5V24FCXXX7TSU:STAStartconditionsetuptime4700600600250————ns1.7V≤VCC<2.5V2.5V≤VCC≤5.5V1.7V≤VCC<2.5V24FCXXX2.5V≤VCC≤5.5V24FCXXX8THD:DATDatainputholdtime0—ns(Note2)9TSU:DATDatainputsetuptime250100100———ns1.7V≤VCC<2.5V2.5V≤VCC≤5.5V1.7V≤VCC≤5.5V24FCXXX10TSU:STOStopconditionsetuptime4000600600250————ns1.7V≤VCC<2.5V2.5V≤VCC≤5.5V1.7V≤VCC<2.5V24FCXXX2.5V≤VCC≤5.5V24FCXXX11TSU:WPWPsetuptime4000600600———ns1.7V≤VCC<2.5V2.5V≤VCC≤5.5V1.7V≤VCC≤5.5V24FCXXX12THD:WPWPholdtime470013001300———ns1.7V≤VCC<2.5V2.5V≤VCC≤5.5V1.7V≤VCC≤5.5V24FCXXXNote1:Not100%tested.CB=totalcapacitanceofonebuslineinpF.2:Asatransmitter,thedevicemustprovideaninternalminimumdelaytimetobridgetheundefinedregion(minimum300ns)ofthefallingedgeofSCLtoavoidunintendedgenerationofStartorStopconditions.3:Thisparameterisnottestedbutensuredbycharacterization.Forenduranceestimatesinaspecificapplication,pleaseconsulttheTotalEndurance™Model,whichcanbeobtainedfromMicrochip’swebsite:www.microchip.com.4:24FCXXXdenotesthe24FC64,24FC128,24FC256and24FC512devices.13TAAOutputvalidfromclock(Note2)————3500900900400ns1.7V≤VCC<2.5V2.5V≤VCC≤5.5V1.7V≤VCC<2.5V24FCXXX2.5V≤VCC≤5.5V24FCXXX14TBUFBusfreetime:Timethebusmustbefreebeforeanewtransmissioncanstart————ns1.7V≤VCC<2.5V2.5V≤VCC≤5.5V1.7V≤VCC<2.5V24FCXXX2.5V≤VCC≤5.5V24FCXXX15TOFOutputfalltimefromVIHminimumtoVILmaximumCB≤100pF10+0.1CB250250nsAllexcept24FCXXX(Note1)24FCXXX(Note1)16TSPInputfilterspikesuppression(SDAandSCLpins)—50nsAllexcept24FCXXX(Note1)17TWCWritecycletime(byteorpage)—5ms18—Endurance1,000,000—cycles25°C(Note3)TABLE2-2:ACCHARACTERISTICS–ALLEXCEPT24XX00,24C01CAND24C02C(CONTINUED)ACCHARACTERISTICSElectricalCharacteristics:Industrial(I):VCC=+1.7Vto5.5VTA=-40°Cto+85°CAutomotive(E):VCC=+2.5Vto5.5VTA=-40°Cto125°CParam.No.Sym.CharacteristicMin.Max.UnitsConditionsNote1:Not100%tested.CB=totalcapacitanceofonebuslineinpF.2:Asatransmitter,thedevicemustprovideaninternalminimumdelaytimetobridgetheundefinedregion(minimum300ns)ofthefallingedgeofSCLtoavoidunintendedgenerationofStartorStopconditions.3:Thisparameterisnottestedbutensuredbycharacterization.Forenduranceestimatesinaspecificapplication,pleaseconsulttheTotalEndurance™Model,whichcanbeobtainedfromMicrochip’swebsite:www.microchip.com.4:24FCXXXdenotesthe24FC64,24FC128,24FC256and24FC512devices.TABLE2-3:ACCHARACTERISTICS–24XX00,24C01CAND24C02CAllParametersapplyacrossallrecommendedoperatingrangesunlessotherwisenotedIndustrial(I):TA=-40°Cto+85°C,VCC=1.7Vto5.5VAutomotive(E):TA=-40°Cto+125°C,VCC=4.5Vto5.5VParameterSymbolMin.Max.UnitsConditionsClockfrequencyFCLK———100100400kHz4.5V≤Vcc≤5.5V(ETemprange)1.7V≤Vcc≤4.5V4.5V≤Vcc≤5.5VClockhightimeTHIGH40004000600———ns4.5V≤Vcc≤5.5V(ETemprange)1.7V≤Vcc≤4.5V4.5V≤Vcc≤5.5VClocklowtimeTLOW470047001300———ns4.5V≤Vcc≤5.5V(ETemprange)1.7V≤Vcc≤4.5V4.5V≤Vcc≤5.5VSDAandSCLrisetime(Note1)TR———10001000300ns4.5V≤Vcc≤5.5V(ETemprange)1.7V≤Vcc≤4.5V4.5V≤Vcc≤5.5VSDAandSCLfalltimeTF—300ns(Note1)StartconditionholdtimeTHD:STA40004000600———ns4.5V≤Vcc≤5.5V(ETemprange)1.7V≤Vcc≤4.5V4.5V≤Vcc≤5.5VStartconditionsetuptimeTSU:STA47004700600———ns4.5V≤Vcc≤5.5V(ETemprange)1.7V≤Vcc≤4.5V4.5V≤Vcc≤5.5VDatainputholdtimeTHD:DAT0—ns(Note2)DatainputsetuptimeTSU:DAT250250100———ns4.5V≤Vcc≤5.5V(ETemprange)1.7V≤Vcc≤4.5V4.5V≤Vcc≤5.5VStopconditionsetuptimeTSU:STO40004000600———ns4.5V≤Vcc≤5.5V(ETemprange)1.7V≤Vcc≤4.5V4.5V≤Vcc≤5.5VOutputvalidfromclock(Note2)TAA———35003500900ns4.5V≤Vcc≤5.5V(ETemprange)1.7V≤Vcc≤4.5V4.5V≤Vcc≤5.5VBusfreetime:Timethebusmustbefreebeforeanewtransmis-sioncanstartTBUF470047001300———ns4.5V≤Vcc≤5.5V(ETemprange)1.7V≤Vcc≤4.5V4.5V≤Vcc≤5.5VOutputfalltimefromVIHminimumtoVILmaximumTOF20+0.1CB250ns(Note1),CB≤100pFInputfilterspikesuppression(SDAandSCLpins)TSP—50ns(Note1)WritecycletimeTWC—41.5ms24XX0024C01C,24C02CEndurance1,000,000—cycles(Note3)Note1:Not100%tested.CB=totalcapacitanceofonebuslineinpF.2:Asatransmitter,thedevicemustprovideaninternalminimumdelaytimetobridgetheundefinedregion(minimum300ns)ofthefallingedgeofSCLtoavoidunintendedgenerationofStartorStopconditions.3:Thisparameterisnottestedbutensuredbycharacterization.Forenduranceestimatesinaspecificapplication,pleaseconsulttheTotalEndurance™Modelwhichcanbeobtainedatwww.microchip.com.FIGURE2-1:BUSTIMINGDATA(unprotected)(protected)SCLSDAINSDAOUTWP57616328913D44101112143.0PINDESCRIPTIONSThedescriptionsofthepinsarelistedinTable3-1.TABLE3-1:PINFUNCTIONTABLE3.1A0,A1,A2ChipAddressInputsTheA0,A1andA2pinsarenotusedbythe24XX01through24XX16devices.TheA0,A1andA2inputsareusedbythe24C01C,24C02C,24XX014,24XX024,24XX025andthe24XX32through24XX512formultipledeviceopera-tions.Thelevelsontheseinputsarecomparedwiththecorrespondingbitsintheslaveaddress.Thechipisselectedifthecompareistrue.Forthe24XX128and24XX256intheMSOPpackageonly,pinsA0andA1arenotconnected.Uptoeightdevices(twoforthe24XX128and24XX256MSOPpackage)maybeconnectedtothesamebusbyusingdifferentChipSelectbitcombinations.Inmostapplications,thechipaddressinputsA0,A1andA2arehard-wiredtologic‘0’orlogic‘1’.Forapplicationsinwhichthesepinsarecontrolledbyamicrocontrollerorotherprogrammabledevice,thechipaddresspinsmustbedriventologic‘0’orlogic‘1’beforenormaldeviceoperationcanproceed.3.2SerialData(SDA)Thisisabidirectionalpinusedtotransferaddressesanddataintoandoutofthedevice.Itisanopendrainterminal.Therefore,theSDAbusrequiresapull-upresistortoVCC(typical10kΩfor100kHz,2kΩfor400kHzand1MHz).Fornormaldatatransfer,SDAisallowedtochangeonlyduringSCLlow.ChangesduringSCLhigharereservedforindicatingtheStartandStopconditions.3.3SerialClock(SCL)Thisinputisusedtosynchronizethedatatransfertoandfromthedevice.3.4Write-Protect(WP)ThispinmustbeconnectedtoeitherVSSorVCC.IftiedtoVSS,writeoperationsareenabled.IftiedtoVCC,writeoperationsareinhibitedbutreadoperationsarenotaffected.SeeTable1-1forthewrite-protectschemeofeachdevice.3.5PowerSupply(VCC)AVCCthresholddetectcircuitisemployedwhichdisablestheinternalerase/writelogicifVCCisbelow1.5Vatnominalconditions.Forthe24C00,24C01Cand24C02Cdevices,theerase/writelogicisdisabledbelow3.8Vatnominalconditions.PinName8-PinPDIPandSOIC8-PinTSSOPandMSOP5-PinSOT-2324XX005-PinSOT-23Allexcept24XX0014-PinTSSOP8-Pin5x6DFNand2x3DFNFunctionA011(1)——11UserconfigurableChipSelect(3)A122(1)——22UserconfigurableChipSelect(3)A233——63UserconfigurableChipSelect(3)VSS442274GroundSDA553385SerialDataSCL661196SerialClock(NC)——4—3,4,5,10,11,12—NotConnectedWP7(2)7(2)—5137Write-ProtectInputVCC8854148PowerSupplyNote1:Pins1and2arenotconnectedforthe24XX128and24XX256MSOPpackages.2:Pin7isnotusedfor24XX00,24XX025and24C01C.3:PinsA0,A1andA2arenotusedbysomedevices(nointernalconnections).SeeTable1-1fordetails.4.0FUNCTIONALDESCRIPTIONEach24XXdevicesupportsabidirectional,2-wirebusanddatatransmissionprotocol.Adevicethatsendsdataontothebusisdefinedasatransmitter,whileadevicereceivingdataisdefinedasareceiver.Thebushastobecontrolledbyamasterdevicewhichgener-atestheSerialClock(SCL),controlsthebusaccessandgeneratestheStartandStopconditions,whilethe24XXworksasslave.Bothmasterandslavecanoperateastransmitterorreceiver,butthemasterdevicedetermineswhichmodeisactivated.BlockDiagramHVGeneratorEEPROMArrayPageLatches*YDECXDECSenseAmp.R/WControlMemoryControlLogicI/OControlLogicI/OA0*A1*A2*SDASCLVCCVSSWP**A0,A1,A2,WPandpagelatchesarenotusedbysomedevices.SeeTable1-1,DeviceSelectionTable,fordetails.5.0BUSCHARACTERISTICSThefollowingbusprotocolhasbeendefined:•Datatransfermaybeinitiatedonlywhenthebusisnotbusy.•Duringdatatransfer,thedatalinemustremainstablewhenevertheclocklineishigh.ChangesinthedatalinewhiletheclocklineishighwillbeinterpretedasaStartorStopcondition.Accordingly,thefollowingbusconditionshavebeendefined(Figure5-1).5.1BusNotBusy(A)Bothdataandclocklinesremainhigh.5.2StartDataTransfer(B)Ahigh-to-lowtransitionoftheSDAlinewhiletheclock(SCL)ishighdeterminesaStartcondition.AllcommandsmustbeprecededbyaStartcondition.5.3StopDataTransfer(C)Alow-to-hightransitionoftheSDAlinewhiletheclock(SCL)ishighdeterminesaStopcondition.AlloperationsmustbeendedwithaStopcondition.5.4DataValid(D)Thestateofthedatalinerepresentsvaliddatawhen,afteraStartcondition,thedatalineisstableforthedurationofthehighperiodoftheclocksignal.Thedataonthelinemustbechangedduringthelowperiodoftheclocksignal.Thereisoneclockpulseperbitofdata.EachdatatransferisinitiatedwithaStartconditionandterminatedwithaStopcondition.ThenumberofdatabytestransferredbetweenStartandStopconditionsisdeterminedbythemasterdevice.5.5AcknowledgeEachreceivingdevice,whenaddressed,isobligedtogenerateanacknowledgeafterthereceptionofeachbyte.ThemasterdevicemustgenerateanextraclockpulsewhichisassociatedwiththisAcknowledgebit.ThedevicethatacknowledgeshastopulldowntheSDAlineduringtheacknowledgeclockpulseinsuchawaythattheSDAlineisstablelowduringthehighperiodoftheacknowledgerelatedclockpulse.Ofcourse,setupandholdtimesmustbetakenintoaccount.Duringreads,amastermustsignalanend-of-datatotheslavebynotgeneratinganAcknowledgebitonthelastbytethathasbeenclockedoutoftheslave.Inthiscase,theslave(24XX)willleavethedatalinehightoenablethemastertogeneratetheStopcondition(Figure5-2).FIGURE5-1:DATATRANSFERSEQUENCEONTHESERIALBUSFIGURE5-2:ACKNOWLEDGETIMINGNote:Duringawritecycle,the24XXwillnotacknowledgecommands.SCLSDA(A)(B)(D)(D)(A)(C)StartConditionAddressorAcknowledgeValidDataAllowedtoChangeStopConditionSCL987654321123TransmittermustreleasetheSDAlineatthispoint,allowingtheReceivertopulltheSDAlinelowtoacknowledgethepreviouseightbitsofdata.ReceivermustreleasetheSDAlineatthispointsotheTransmittercancontinuesendingdata.DatafromtransmitterSDAAcknowledgebitDatafromtransmitter5.6DeviceAddressingForDevicesWithoutFunctionalAddressPinsAcontrolbyteisthefirstbytereceivedfollowingtheStartconditionfromthemasterdevice(Figure5-3).Thecontrolbytebeginswithafour-bitcontrolcode.Forthe24XX,thisissetas‘1010’binaryforreadandwriteoperations.Thenextthreebitsofthecontrolbytearetheblock-selectbits(B2,B1,B0).Theyareusedbythemasterdevicetoselectwhichofthe256-wordblocksofmemoryaretobeaccessed.ThesebitsareineffectthethreeMostSignificantbitsofthewordaddress.NotethatB2,B1andB0are“don’tcare”forthe24XX00,the24XX01and24XX02.B2andB1are“don’tcare”forthe24XX04.B2is“don’tcare”forthe24XX08.Thelastbitofthecontrolbytedefinestheoperationtobeperformed.Whensetto‘1’,areadoperationisselected.Whensetto‘0’awriteoperationisselected.FollowingtheStartcondition,the24XXmonitorstheSDAbus.Uponreceivinga‘1010’code,theblockAcknowledgesignalontheSDAline.Theaddressbytefollowstheacknowledge.FIGURE5-3:CONTROLANDADDRESSBYTEASSIGNMENTSFORDEVICESWITHOUTADDRESSPINSS1010xxxR/WACKS1010xxxR/WACKS1010xxxR/WACKS1010xxB0R/WACKS1010xB1B0R/WACKS11B2B1B0R/WACK24XX0124XX0224XX0424XX0824XX016x=“don’tcare”bitAcknowledgeControlCodeStartbitControlByteBlockSelectbitsAddressByte24XX00Read/Writebit(read=1,write=0)xxxxA3..A0xA6.....A0A7......A0A7......A0A7......A0A7......A0bit5.7DeviceAddressingForDevicesWithFunctionalAddressPinsAcontrolbyteisthefirstbytereceivedfollowingtheStartconditionfromthemasterdevice(Figure5-4).Thecontrolbytebeginswitha4-bitcontrolcode.Forthe24XX,thisissetas‘1010’binaryforreadandwriteoperations.ThenextthreebitsofthecontrolbytearetheChipSelectbits(A2,A1,A0).TheChipSelectbitsallowtheuseofuptoeight24XXdevicesonthesamebusandareusedtoselectwhichdeviceisaccessed.TheChipSelectbitsinthecontrolbytemustcorre-spondtothelogiclevelsonthecorrespondingA2,A1andA0pinsforthedevicetorespond.Thesebitsare,ineffect,thethreeMostSignificantbitsofthewordaddress.For24XX128and24XX256intheMSOPpackage,theA0andA1pinsarenotconnected.Duringdeviceaddressing,theA0andA1ChipSelectbits(Figure5-4)shouldbesetto‘0’.Onlytwo24XX128or24XX256MSOPpackagescanbeconnectedtothesamebus.Thelastbitofthecontrolbytedefinestheoperationtobeperformed.Whensettoa‘1’,areadoperationisselected.Whensettoa‘0’,awriteoperationisselected.Forhigherdensitydevices(24XX32through24XX512),thenexttwobytesreceiveddefinetheaddressofthefirstdatabyte.Dependingontheprod-uctdensity,notallbitsintheaddresshighbyteareused.A15,A14,A13andA12are“don’tcare”for24XX32.A15,A14andA13are“don’tcare”for24XX64.A15andA14are“don’tcare”for24XX128.A15is“don’tcare”for24XX256.Alladdressbitsareusedforthe24XX512.Theupperaddressbitsaretransferredfirst,followedbytheLessSignificantbits.FollowingtheStartcondition,the24XXmonitorstheSDAbus.Uponreceivinga‘1010’code,appropriatedeviceselectbitsandtheR/Wbit,theslavedeviceout-putsanAcknowledgesignalontheSDAline.Theaddressby
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