tpa0312

www.ti.com FEATURES 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 PWP PACKAGE (TOP VIEW) GND GAIN0 GAIN1 LOUT+ LLINEIN LHPIN PVDD RIN LOUT– LIN BYPASS GND GND RLINEIN SHUTDOWN ROUT+ RHPIN VDD PVDD HP/LINE ROUT– SE/BTL PC-BEEP GND DESCRIPTION TPA0312 SLOS335A–DECEMBER 2000–REVISED OCTOBER 2004 2.6-W STEREO AUDIO POWER AMPLIFIER WITH FOUR SELECTABLE GAIN SETTINGS AND MUX CONTROL • Compatible With PC 99 Desktop Line-Out Into 10-kΩ Load • Internal Gain Control, Which Eliminates External Gain-Setting Resistors • 2.6-W/Ch Output Power Into 3-Ω Load • Input MUX Select Terminal • PC-Beep Input • Depop Circuitry • Stereo Input MUX • Fully Differential Input • Low Supply Current and Shutdown Current • Surface-Mount Power Packaging 24-Pin TSSOP PowerPAD™ The TPA0312 is a stereo audio power amplifier in a 24-pin TSSOP thermally enhanced package capable of delivering 2.6 W of continuous RMS power per channel into 3-Ω loads. This device minimizes the number of external components needed, simplifying the design, and freeing up board space for other features. When driving 1 W into 8-Ω speakers, the TPA0312 has less than 0.65% THD+N across its specified frequency range. Included within this device is integrated depop circuitry that virtually eliminates transients that cause noise in the speakers. Amplifier gain is internally configured and controlled by way of two terminals (GAIN0 and GAIN1). BTL gain settings of 6 dB, 10 dB, 15.6 dB, and 21.6 dB (inverting) are provided, whereas SE gain is always configured as 4.1 dB for headphone drive. An internal input MUX allows two sets of stereo inputs to the amplifier. The HP/LINE terminal allows the user to select which MUX input is active, regardless of whether the amplifier is in SE or BTL mode. In notebook applications, where internal speakers are driven as BTL and the line outputs (often headphone drive) are required to be SE, the TPA0312 automatically switches into SE mode when the SE/BTL input is activated, and this reduces the gain to 4.1 dB. The TPA0312 consumes only 6 mA of supply current during normal operation. A miserly shutdown mode reduces the supply current to 150 µA. The PowerPAD™ package (PWP) delivers a level of thermal performance that was previously achievable only in TO-220-type packages. Thermal impedances of approximately 35°C/W are readily realized in multilayer PCB applications. This allows the TPA0312 to operate at full power into 8-Ω loads at an ambient temperature of 85°C. AVAILABLE OPTIONS PACKAGED DEVICE TA TSSOP (1) (PWP) –40°C to 85°C TPA0312PWP (1) The PWP package is available taped and reeled. To order a taped and reeled part, add the suffix R to the part number (e.g., TPA0312PWPR). Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright © 2000–2004, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. www.ti.com ROUT+ − + − + R MUX Volume Control PC Beep MUX Control Depop Circuitry Power Management − + − + L MUX Volume Control RHPIN RLINEIN GAIN1 RIN PC-BEEP SE/BTL LHPIN LLINEIN LIN ROUT− PVDD VDD BYPASS SHUTDOWN GND LOUT+ LOUT− Volume Control Volume Control HP/LINE GAIN0 TPA0312 SLOS335A–DECEMBER 2000–REVISED OCTOBER 2004 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. FUNCTIONAL BLOCK DIAGRAM 2 www.ti.com TPA0312 SLOS335A–DECEMBER 2000–REVISED OCTOBER 2004 TERMINAL FUNCTIONS TERMINAL I/O DESCRIPTION NAME NO. BYPASS 11 Tap to voltage divider for internal mid-supply bias generator GAIN0 2 I Bit 0 of gain control GAIN1 3 I Bit 1 of gain control 1, 12, 13,GND Ground connection for circuitry. Connected to the thermal pad.24 LHPIN 6 I Left-channel headphone input, selected when SE/BTL is held high LIN 10 I Common left input for fully differential input. AC ground for single-ended inputs. LLINEIN 5 I Left-channel line input, selected when SE/BTL is held low LOUT+ 4 O Left-channel positive output in BTL mode and positive output in SE mode LOUT- 9 O Left-channel negative output in BTL mode and high-impedance in SE mode The input for PC Beep mode. PC-BEEP is enabled when a > 1.5-V (peak-to-peak) square wave is inputPC-BEEP 14 I to PC-BEEP HP/LINE is the input MUX control input. When the HP/LINE terminal is held high, the headphone inputs HP/LINE 17 I (LHPIN or RHPIN [6, 20]) are active. When the HP/LINE terminal is held low, the line inputs (LLINEIN or RLINEIN [5, 23]) are active. PVDD 7, 18 I Power supply for output stage RHPIN 20 I Right-channel headphone input, selected when SE/BTL is held high RIN 8 I Common right input for fully differential input. AC ground for single-ended inputs. RLINEIN 23 I Right-channel line input, selected when SE/BTL is held low ROUT+ 21 O Right-channel positive output in BTL mode and positive output in SE mode ROUT- 16 O Right-channel negative output in BTL mode and high-impedance in SE mode SHUTDOWN 22 I Places entire IC in shutdown mode when held low, except PC-BEEP remains active SE/BTL 15 I Hold SE/BTL low for BTL mode and hold high for SE mode. VDD 19 I Analog VDD input supply. This terminal needs to be isolated from PVDD to achieve highest performance. Connect to ground. Must be soldered down in all applications to properly secure the device on the PCThermal Pad board. 3 www.ti.com ABSOLUTE MAXIMUM RATINGS DISSIPATION RATING TABLE RECOMMENDED OPERATING CONDITIONS ELECTRICAL CHARACTERISTICS TPA0312 SLOS335A–DECEMBER 2000–REVISED OCTOBER 2004 over operating free-air temperature range (unless otherwise noted) (1) VDD Supply voltage 6 V VI Input voltage –0.3 V to VDD +0.3 V Continuous total power dissipation Internally limited (see Dissipation Rating Table) TA Operating free-air temperature range –40°C to 85°C TJ Operating junction temperature range –40°C to 150°C Tstg Storage temperature range –65°C to 85°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. PACKAGE TA≤ 25°C DERATING FACTOR TA = 70°C TA = 85°C PWP 2.7 W (1) 21.8 mW/°C 1.7 W 1.4 W (1) See the Texas Instruments document, PowerPAD Thermally Enhanced Package Application Report (literature number SLMA002), for more information on the PowerPAD package. The thermal data was measured on a PCB layout based on the information in the section entitled Texas Instruments Recommended Board for PowerPAD of the before-mentioned document. MIN MAX UNIT VDD Supply voltage 4.5 5.5 V SE/BTL, HP/LINE, GAIN0, GAIN1 0.8 x VDDVIH High-level input voltage VSHUTDOWN 2 SE/BTL, HP/LINE 0.6 x VDD VIL Low-level input voltage GAIN0, GAIN1 0.4 x VDD V SHUTDOWN 0.8 TA Operating free-air temperature –40 85 °C at specified free-air temperature, VDD = 5 V, TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT |VOO| Output offset voltage (measured differentially) VI = 0, Av = 6 dB 25 mV PSRR Power supply rejection ratio VDD = 4.5 V to 5.5 V 77 dB |IIH| High-level input current VDD = 5.5 V, VI = VDD 1 µA |IIL| Low-level input current VDD = 5.5 V, VI = 0 V 1 µA BTL mode 6 10 IDD Supply current mASE mode 3 5 IDD(SD) Supply current, shutdown mode 150 300 µA 4 www.ti.com OPERATING CHARACTERISTICS TYPICAL CHARACTERISTICS TPA0312 SLOS335A–DECEMBER 2000–REVISED OCTOBER 2004 VDD = 5 V, TA = 25°C, RL = 8 Ω , Gain = 6 dB, BTL mode PARAMETER TEST CONDITIONS MIN TYP MAX UNIT THD + N= 10% 2.6 PO Output power RL = 3 Ω WTHD + N = 1%, 2.05 THD + N Total harmonic distortion plus noise PO = 1 W, f = 20 Hz to 15 kHz 0.65% BOM Maximum output power bandwidth THD = 5% >15 kHz Supply ripple rejection ratio f = 1 kHz, CB = 0.47 µF BTL mode 72 dB SNR Signal-to-noise ratio 105 dB BTL mode 20CB = 0.47 µF, f = 20 HzVn Noise output voltage µVRMSto 20 kHz SE mode 18 ZI Input impedance See Table 1 TABLE OF GRAPHS FIGURE 1, 4-6, 9-11, vs Output power 14-16, 18 THD+N Total harmonic distortion plus noise 2, 3, 7, 8, 12, vs Frequency 13, 17, 19 vs Output voltage 20 Vn Output noise voltage vs Bandwidth 21 Supply ripple rejection ratio vs Frequency 22, 23 Crosstalk vs Frequency 24, 25 Shutdown attenuation vs Frequency 26 SNR Signal-to-noise ratio vs Frequency 27 Closed-loop response 28-30 PO Output power vs Load resistance 31, 32 vs Output power 33, 34 PD Power dissipation vs Ambient temperature 35 5 www.ti.com 0.1% 0.01% 0.5 0.75 1 1.25 1.5 1.75 2 1% 10% 2.25 2.5 2.75 3 PO − Output Power − W AV = 6 dB f = 1 kHz BTL TH D+ N −T o ta l H ar m on ic D is to rti on + N oi se RL = 8 Ω RL = 3 Ω RL = 4 Ω 0.01% 10% 20 100 1k 10k 20k TH D+ N −T o ta l H ar m on ic D is to rti on + N oi se f − Frequency − Hz 1% 0.1% PO = 1.75 W RL = 3 Ω BTL AV = 15.6 dB AV = 6 dBAV = 21.6 dB 0.1% 0.01% 0.01 0.1 1% 10% 1 10 f = 20 Hz f = 1 kHz PO − Output Power − W RL = 3 Ω AV = 6 dB BTL TH D+ N −T o ta l H ar m on ic D is to rti on + N oi se f = 15 kHz 0.01% 10% 20 100 1k 10k 20k TH D+ N −T o ta l H ar m on ic D is to rti on + N oi se f − Frequency − Hz 1% 0.1% RL = 3 Ω AV = 6 dB BTL PO = 1.75 W PO = 0.5 W PO = 1.0 W TPA0312 SLOS335A–DECEMBER 2000–REVISED OCTOBER 2004 TOTAL HARMONIC DISTORTION PLUS NOISE TOTAL HARMONIC DISTORTION PLUS NOISE vs vs OUTPUT POWER FREQUENCY Figure 1. Figure 2. TOTAL HARMONIC DISTORTION PLUS NOISE TOTAL HARMONIC DISTORTION PLUS NOISE vs vs FREQUENCY OUTPUT POWER Figure 3. Figure 4. 6 www.ti.com 0.1% 0.01% 0.01 0.1 1% 10% 1 10 f = 20 Hz f = 1 kHz PO − Output Power − W RL = 3 Ω AV = 15.6 dB BTL TH D+ N −T o ta l H ar m on ic D is to rti on + N oi se f = 15 kHz 0.1% 0.01% 0.01 0.1 1% 10% 1 10 f = 20 Hz f = 1 kHz PO − Output Power − W RL = 3 Ω AV = 21.6 dB BTL TH D+ N −T o ta l H ar m on ic D is to rti on + N oi se f = 15 kHz 0.01% 10% 20 100 1k 10k 20k TH D+ N −T o ta l H ar m on ic D is to rti on + N oi se f − Frequency − Hz 1% 0.1% PO = 1.75 W RL = 3 Ω BTL AV = 15.6 dB AV = 6 dB AV = 21.6 dB 0.01% 10% 20 100 1k 10k 20k TH D+ N −T o ta l H ar m on ic D is to rti on + N oi se f − Frequency − Hz 1% 0.1% RL = 4 Ω AV = 6 dB BTL PO = 0.25 W PO = 1.0 W PO = 1.5 W TPA0312 SLOS335A–DECEMBER 2000–REVISED OCTOBER 2004 TOTAL HARMONIC DISTORTION PLUS NOISE TOTAL HARMONIC DISTORTION PLUS NOISE vs vs OUTPUT POWER OUTPUT POWER Figure 5. Figure 6. TOTAL HARMONIC DISTORTION PLUS NOISE TOTAL HARMONIC DISTORTION PLUS NOISE vs vs FREQUENCY FREQUENCY Figure 7. Figure 8. 7 www.ti.com 0.1% 0.01% 0.01 0.1 1% 10% 1 10 f = 20 Hz f = 1 kHz PO − Output Power − W RL = 4 Ω AV = 6 dB BTL TH D+ N −T o ta l H ar m on ic D is to rti on + N oi se f = 15 kHz 0.1% 0.01% 0.01 0.1 1% 10% 1 10 f = 20 Hz f = 1 kHz PO − Output Power − W RL = 4 Ω AV = 15.6 dB BTLT HD +N − To ta l H ar m on ic D is to rti on + N oi se f = 15 kHz 0.1% 0.01% 0.01 0.1 1% 10% 1 10 f = 20 Hz f = 1 kHz PO − Output Power − W RL = 4 Ω AV = 21.6 dB BTLT HD +N − To ta l H ar m on ic D is to rti on + N oi se f = 15 kHz 0.01% 10% 20 100 1k 10k 20k TH D+ N −T o ta l H ar m on ic D is to rti on + N oi se f − Frequency − Hz 1% 0.1% RL = 8 Ω AV = 6 dB BTL PO = 0.25 W PO = 1.0 W PO = 0.5 W TPA0312 SLOS335A–DECEMBER 2000–REVISED OCTOBER 2004 TOTAL HARMONIC DISTORTION PLUS NOISE TOTAL HARMONIC DISTORTION PLUS NOISE vs vs OUTPUT POWER OUTPUT POWER Figure 9. Figure 10. TOTAL HARMONIC DISTORTION PLUS NOISE TOTAL HARMONIC DISTORTION PLUS NOISE vs vs OUTPUT POWER FREQUENCY Figure 11. Figure 12. 8 www.ti.com 0.1% 0.01% 0.01 0.1 1% 10% 1 10 f = 20 Hz f = 1 kHz PO − Output Power − W RL = 8 Ω AV = 6 dB BTL TH D+ N −T o ta l H ar m on ic D is to rti on + N oi se f = 15 kHz 0.01% 10% 20 100 1k 10k 20k TH D+ N −T o ta l H ar m on ic D is to rti on + N oi se f − Frequency − Hz 1% 0.1% PO = 1 W RL = 8 Ω BTL AV = 15.6 dB AV = 6 dB AV = 21.6 dB 0.1% 0.01% 0.01 0.1 1% 10% 1 10 f = 20 Hz f = 1 kHz PO − Output Power − W RL = 8 Ω AV = 15.6 dB BTL TH D+ N −T o ta l H ar m on ic D is to rti on + N oi se f = 15 kHz 0.1% 0.01% 0.01 0.1 1% 10% 1 10 f = 20 Hz f = 1 kHz PO − Output Power − W RL = 8 Ω AV = 21.6 dB BTL TH D+ N −T o ta l H ar m on ic D is to rti on + N oi se f = 15 kHz TPA0312 SLOS335A–DECEMBER 2000–REVISED OCTOBER 2004 TOTAL HARMONIC DISTORTION PLUS NOISE TOTAL HARMONIC DISTORTION PLUS NOISE vs vs FREQUENCY OUTPUT POWER Figure 13. Figure 14. TOTAL HARMONIC DISTORTION PLUS NOISE TOTAL HARMONIC DISTORTION PLUS NOISE vs vs OUTPUT POWER OUTPUT POWER Figure 15. Figure 16. 9 www.ti.com 0.1% 0.01% 0.01 0.1 1% 10% 1 PO − Output Power − W TH D+ N −T o ta l H ar m on ic D is to rti on + N oi se RL = 32 Ω AV = 4.1 dB SE f = 20 Hz f = 1 kHz f = 15 kHz 0.01% 10% 20 100 1k 10k 20k TH D+ N −T o ta l H ar m on ic D is to rti on + N oi se f − Frequency − Hz RL = 32 Ω AV = 4.1 dB SE PO = 75 mW PO = 25 mW PO = 50 mW 1% 0.1% 0.001% 10% 20 100 1k 10k 20k TH D+ N −T o ta l H ar m on ic D is to rti on + N oi se f − Frequency − Hz 1% 0.1% RL = 10 kΩ AV = 4.1 dB SE VO = 1 VRMS 0.01% 0.001% 10% 0.1 1 3 TH D+ N −T o ta l H ar m on ic D is to rti on + N oi se 1% 0.1% RL = 10 kΩ AV = 4.1 dB SE f = 20 Hz 0.01% f = 15 kHz f = 1 kHz VO − Output Voltage − VRMS TPA0312 SLOS335A–DECEMBER 2000–REVISED OCTOBER 2004 TOTAL HARMONIC DISTORTION PLUS NOISE TOTAL HARMONIC DISTORTION PLUS NOISE vs vs FREQUENCY OUTPUT POWER Figure 17. Figure 18. TOTAL HARMONIC DISTORTION PLUS NOISE TOTAL HARMONIC DISTORTION PLUS NOISE vs vs FREQUENCY OUTPUT VOLTAGE Figure 19. Figure 20. 10 www.ti.com 60 0 10 100 1k 10k VDD = 5 V RL = 4Ω − O ut pu t N oi se V o lta ge − V n Vµ 100 90 70 80 50 40 30 20 10 AV = 21.6 dB AV = 6 dB AV = 15.6 dB BW − Bandwidth − Hz −120 −40 20 100 1k 10k 20k f − Frequency − Hz −60 −80 −100 RL = 8 Ω CB = 0.47 µF, AV = 6 dB BTL −20 0 Su pp ly R ip pl e Re jec tio n R ati o − dB −120 −40 20 100 1k 10k 20k f − Frequency − Hz −60 −80 −100 RL = 32 Ω CB = 0.47 µF, AV =4.1 dB SE −20 0 Su pp ly R ip pl e Re jec tio n R ati o − dB −120 −40 20 100 1k 10k 20k Cr os st al k − dB f − Frequency − Hz −60 −80 −100 PO = 1 W RL = 8 Ω Av = 6 dB BTL −20 0 LEFT TO RIGHT RIGHT TO LEFT TPA0312 SLOS335A–DECEMBER 2000–REVISED OCTOBER 2004 OUTPUT NOISE VOLTAGE SUPPLY RIPPLE REJECTION RATIO vs vs BANDWIDTH FREQUENCY Figure 21. Figure 22. SUPPLY RIPPLE REJECTION RATIO CROSSTALK vs vs FREQUENCY FREQUENCY Figure 23. Figure 24. 11 www.ti.com −120 −40 20 100 1k 10k 20k Cr os st al k − dB f − Frequency − Hz −60 −80 −100 VO = 1 VRMS RL = 10 kΩ Av = 4.1 dB SE −20 0 LEFT TO RIGHT RIGHT TO LEFT −120 −40 20 100 1k 10k 20k Sh ut do w n At te nu at io n − db f − Frequency − Hz −60 −80 −100 VI = 1 VRMS −20 0 RL = 8 Ω, BTL RL = 32 Ω, SE RL = 10 kΩ, SE 60 120 20 100 1k 10k 20k SN R − Si gn al -T o -N oi se R at io − d B f − Frequency − Hz 110 100 90 130 140 70 80 PO = 1 W RL = 8 Ω BTL AV = 21.6 dB AV = 15.6 dBAV = 6 dB TPA0312 SLOS335A–DECEMBER 2000–REVISED OCTOBER 2004 CROSSTALK SHUTDOWN ATTENUATION vs vs FREQUENCY FREQUENCY Figure 25. Figure 26. SIGNAL-TO-NOISE RATIO vs FREQUENCY Figure 27. 12 www.ti.com −10 5 10 100 1k 10k 100k G ai n − dB f − Frequency − Hz 2.5 0 −2.5 7.5 10 −7.5 −5 180° 90° 0° −90° −180° 1M Ph as e RL = 8 Ω AV = 6 dB BTL Gain Phase −10 20 10 100 1k 10k 100k G ai n − dB f − Frequency − Hz 15 10 5 25 30 −5 0 180° 90° 0° −90° −180° 1M RL = 8 Ω AV = 15.6 dB BTL Gain Phase Ph as e TPA0312 SLOS335A–DECEMBER 2000–REVISED OCTOBER 2004 CLOSED-LOOP RESPONSE Figure 28. CLOSED-LOOP RESPONSE Figure 29. 13 www.ti.com −10 20 10 100 1k 10k 100k G ai n − dB f − Frequency − Hz 15 10 5 25 30 −5 0 180° 90° 0° −90° −180° 1M RL = 8 Ω AV = 21.6 dB BTL Gain Phase Ph as e 2 1.5 0 0 8 16 24 32 40 2.5 3 3.5 48 56 64 RL − Load Resistance − Ω AV = 6 dB BTL − O ut pu t P ow er − W P O 1% THD+N 10% THD+N 1 0.5 750 0 0 8 16 24 32 40 1000 1250 1500 48 56 64 RL − Load Resistance − Ω AV = 4.1 dB SE − O ut pu t P ow er − m W P O 1% THD+N 10% THD+N 500 250 TPA0312 SLOS335A–DECEMBER 2000–REVISED OCTOBER 2004 CLOSED-LOOP RESPONSE Figure 30. OUTPUT POWER OUTPUT POWER vs vs LOAD RESISTANCE LOAD RESISTANCE Figure 31. Figure 32. 14 www.ti.com 0.6 0.4 0.2 0 0 1 − Po w er D is si pa tio n − W 1 1.2 1.4 1.5 2.5 0.8 PO − Output Power − W P D 4 Ω 8 Ω f = 1 kHz BTL Each Channel 3 Ω1.6 1.8 0.5 2 0.1 0.05 0 0 0.2 − Po w er D is si pa tio n − W 0.2 0.25 0.3 0.3 0.8 0.15 PO − Output Power − W P D 8 Ω 32 Ω f = 1 kHz SE Each Channel 4 Ω 0.35 0.4 0.1 0.70.4 0.5 0.6 1 0 −40 0 − Po w er D is si pa tio n − W 3 4 5 20 160 2 TA − Ambient Temperature − °C P D 6 7 −20 10040 60 80 120 140 ΘJA3 ΘJA1,2 ΘJA4 ΘJA1 = 45.9°C/W ΘJA2 = 45.2°C/W ΘJA3 = 31.2°C/W ΘJA4 = 18.6°C/W TPA0312 SLOS335A–DECEMBER 2000–REVISED OCTOBER 2004 POWER DISSIPATION POWER DISSIPATION vs vs OUTPUT POWER OUTPUT POWER Figure 33. Figure 34. POWER DISSIPATION vs AMBIENT TEMPERATURE Figure 35. 15 www.ti.com THERMAL INFORMATION DIE Side View (a) End View (b) Bottom View (c) DIE Thermal Pad TPA0312 SLOS335A–DECEMBER 2000–REVISED OCTOBER 2004 The thermally enhanced PWP package is based on the 24-pin TSSOP, but includes a thermal pad (see Figure 36) to provide an effective thermal contact between the IC and the PWB. Traditionally, surface mount and power have been mutually exclusive terms. A variety of scaled-down TO-220-type packages have leads formed as gull wings to make them applicable for surface-mount applications. These packages, however, have only two shortcomings: they do not address the low profile (< 2 mm) requirements of many of today's advanced systems, and they do not offer a terminal-count high enough to accommodate increasing integration. On the other hand, traditional low-power, surface-mount packages require power-dissipation derating that severely limits the usable range of many high-performance analog circuits. The PowerPAD™ package (thermally enhanced TSSOP) combines fine-pitch, surface-mount technology with thermal performance comparable to much larger power packages. The PowerPAD™ package is designed to optimize the heat transfer to the PWB. Because of the small size and limited mass of a TSSOP package, thermal enhancement is achieved by improving the thermal conduction paths that remove heat from the component. The thermal pad is formed using a patented lead-frame design and manufacturing technique to provide a direct connection to the heat-generating IC. When this pad is soldered or otherwise thermally coupled to an external heat dissipator, high power dissipation in the ultrathin, fine-pitch, sur