笔记本电路图仁宝compal la8061p r

ABCDE11Compal22QAL30ProjectLA-8061PREV0.4Schematic33IntelIvyBridge/PantherPoint2012-01-13Rev.0.444SecurityClassificationCompalSecretDataCompalElectronics,Inc.IssuedDate2011/05/23DecipheredDate2012/12/31TitleCoverSheetTHISSHEETOFENGINEERINGDRAWINGISTHEPROPRIETARYPROPERTYOFCOMPALELECTRONICS,INC.ANDCONTAINSSizeDocumentNumberRevANDTRADESECRETINFORMATION.THISSHEETMAYNOTBETRANSFEREDFROMTHECUSTODYOFTHECOMPETENTDIVISIONOFR&DCustom0.1DEPARTMENTEXCEPTASAUTHORIZEDBYCOMPALELECTRONICS,INC.NEITHERTHISSHEETNORTHEINFORMATIONITCONTAINSQAL30LA-8061PMBMAYBEUSEDBYORDISDTOANYTHIRDPARTYWITHOUTPRIORWRITTENCONSENTOFCOMPALELECTRONICS,INC.Date:Friday,January13,2012Sheet1of46ABCDE54321CompalMName:QAL30MobileIvyBridgeFileName:LA-8061PR01CPUDual/QuadCoreMemoryBUS(DDRIII)DualChannel204pinDDRIII-SO-DIMMX2Socket-rPGA9891.5VDDRIII1333/1600BANK0,1,2,3page10,1137.5mm*37.5mmDpage4,5,6,7,8,9DFDIx8DMIx4(UMA)100MHz100MHz5GB/sLVDSConn.Conn.CRTConn.2.7GT/spage20page22page21CRTUSBUSB/BRightInt.CameraRTS51293IN1IntelPantherPoint5V480MbpsUSBport4,9USBport10USBport11page26page20page26LVDSPCBGA98925mm*25mmPCI-Express(PCIE2.5GT/s)100MHzSATAport0SATAHDD5V(6Gb/s)page27port2port1CCPCIeMiniCardRTL8111E1GSATAport2SATAODDWLAN&BT2.05V1.5GHz(150MB/s)page27PCIeport1USBport13page24PCIeport2BIOSROMpage30page23page12,13,14,15,RJ4516,17,18,19HDAudio3.3V24.576MHz/48Mhzpage24LPCBUSHDACodec33MHzALC259page25ENEKB9012(Co-LayKB930)page29BBInt.MICCONNMICCONNHPCONNSPKCONNpage25page25page26page26TouchPadInt.KBDpage26page32CPUXDPpage5RTCCKT.USB/Bpage26page12PCHXDPpage12APower/BDC/DCInterfaceCKT.Apage31page34FanControlPowerCircuitDC/DCpage31page35~44SecurityClassificationCompalSecretDataCompalElectronics,Inc.IssuedDate2011/05/23DecipheredDate2012/12/31TitleBlockDiagramsTHISSHEETOFENGINEERINGDRAWINGISTHEPROPRIETARYPROPERTYOFCOMPALELECTRONICS,INC.ANDCONTAINSSizeDocumentNumberRevANDTRADESECRETINFORMATION.THISSHEETMAYNOTBETRANSFEREDFROMTHECUSTODYOFTHECOMPETENTDIVISIONOFR&D0.1DEPARTMENTEXCEPTASAUTHORIZEDBYCOMPALELECTRONICS,INC.NEITHERTHISSHEETNORTHEINFORMATIONITCONTAINSQAL30LA-8061PMBMAYBEUSEDBYORDISDTOANYTHIRDPARTYWITHOUTPRIORWRITTENCONSENTOFCOMPALELECTRONICS,INC.Date:Wednesday,December21,2011Sheet2of465432154321BoardIDTableforADchannelVcc3.3V+/-5%BOARDIDTableUSBPORT#DESTINATIONRa100K+/-5%BoardIDRbVAD_BIDminVAD_BIDtypVAD_BIDmaxBoardIDPCBRevision0USB2/3(LeftHanddisefront)000V0V0V0QAL3018.2K+/-5%0.168V0.250V0.362V11USB2/3(LeftHanddiseback)D218K+/-5%0.436V0.503V0.538V2D333K+/-5%0.712V0.819V0.875V32None456K+/-5%1.036V1.185V1.264V45100K+/-5%1.453V1.650V1.759V53None6200K+/-5%1.935V2.200V2.341V67NC2.500V3.300V3.300V74USB2(RightHandsidefront)5None6NoneSMBUSControlTablePCH7NoneSOURCEMINI1BATTSODIMMSODIMM8NonePCHCLKOUTDESTINATION0001011xb1001000xb1001010xb9USB2(LeftHandsideback)CEC_SMB_CK1KB930PCI0PCH_LOOPBACKCEC_SMB_DA1KB9012XVXXX10CAMERAEC_SMB_CK2KB930PCI1ECEC_SMB_DA2KB9012XXXXV11CarderPCH_SMBCLKPCI2TPMPCH_SMBDATAPCHXVVV12NonePCI3NonePCH_SML1CLKPCH_SML1DATAPCHXXXXPCI4None13BTCombOPTIMUS:XDP@/D@DIFFERENTIALDESTINATIONFLEXCLOCKSDESTINATIONSATADESTINATIONPCIEXPRESSDESTINATIONBCLKOUT_PCIE0LANCLKOUTFLEX0NoneSATA0HDDLane1LANBCLKOUT_PCIE1WLANCLKOUTFLEX1NoneSATA1NoneLane2WLANCLKOUT_PCIE2NoneCLKOUTFLEX2NoneSATA2ODDLane3NoneCLKCLKOUT_PCIE3NoneCLKOUTFLEX3NoneSATA3NoneLane4NoneCLKOUT_PCIE4NoneSATA4NoneLane5NoneCLKOUT_PCIE5NoneSymbolNote:SATA5NoneLane6NoneCLKOUT_PCIE6None:meansDigitalGroundLane7NoneCLKOUT_PCIE7NoneLane8None:meansAnalogGroundACLKOUT_PEG_AVGAACLKOUT_PEG_BNoneSecurityClassificationCompalSecretDataCompalElectronics,Inc.IssuedDate2011/05/23DecipheredDate2012/12/31TitleNotesListTHISSHEETOFENGINEERINGDRAWINGISTHEPROPRIETARYPROPERTYOFCOMPALELECTRONICS,INC.ANDCONTAINSSizeDocumentNumberRevANDTRADESECRETINFORMATION.THISSHEETMAYNOTBETRANSFEREDFROMTHECUSTODYOFTHECOMPETENTDIVISIONOFR&DCustom0.1DEPARTMENTEXCEPTASAUTHORIZEDBYCOMPALELECTRONICS,INC.NEITHERTHISSHEETNORTHEINFORMATIONITCONTAINSQAL30LA-8061PMBMAYBEUSEDBYORDISDTOANYTHIRDPARTYWITHOUTPRIORWRITTENCONSENTOFCOMPALELECTRONICS,INC.Date:Wednesday,December21,2011Sheet3of465432154321+V1.05S_VJCPU1IRC1PEG_ICOMPIandRCOMPOsignalsshouldbeshortedandrouted24.9_0402_1%with-maxlength=500mils-typicalimpedance=43mohmsPEG_ICOMPOsignalsshouldberoutedwith-maxlength=500milsT35F22-typicalimpedance=14.5mohmsVSS161VSS234JCPU1AT34F19VSS162VSS235DJ22PEG_COMPT33E30DPEG_ICOMPIVSS163VSS236J21T32E27PEG_ICOMPOVSS164VSS237B27H22T31E2414DMI_CRX_PTX_N0DMI_RX#[0]PEG_RCOMPOVSS165VSS238B25T30E2114DMI_CRX_PTX_N1DMI_RX#[1]VSS166VSS239A25T29E1814DMI_CRX_PTX_N2DMI_RX#[2]VSS167VSS240B24K33T28E1514DMI_CRX_PTX_N3DMI_RX#[3]PEG_RX#[0]VSS168VSS241M35T27E13PEG_RX#[1]VSS169VSS242B28L34T26E1014DMI_CRX_PTX_P0DMI_RX[0]PEG_RX#[2]VSS170VSS243B26J35P9E914DMI_CRX_PTX_P1DMI_RX[1]PEG_RX#[3]VSS171VSS244A24J32P8E814DMI_CRX_PTX_P2DMI_RX[2]PEG_RX#[4]VSS172VSS245B23H34P6E714DMI_CRX_PTX_P3DMI_RX[3]PEG_RX#[5]VSS173VSS246H31P5E6PEG_RX#[6]VSS174VSS247G21G33P3E514DMI_CTX_PRX_N0DMI_TX#[0]PEG_RX#[7]VSS175VSS248E22DMIG30P2E414DMI_CTX_PRX_N1DMI_TX#[1]PEG_RX#[8]VSS176VSS249F21F35N35E314DMI_CTX_PRX_N2DMI_TX#[2]PEG_RX#[9]VSS177VSS250D21E34N34E214DMI_CTX_PRX_N3DMI_TX#[3]PEG_RX#[10]VSS178VSS251E32N33E1PEG_RX#[11]VSS179VSS252G22D33N32D3514DMI_CTX_PRX_P0DMI_TX[0]PEG_RX#[12]VSS180VSS253D22D31N31D3214DMI_CTX_PRX_P1DMI_TX[1]PEG_RX#[13]VSS181VSS254F20B33N30D2914DMI_CTX_PRX_P2DMI_TX[2]PEG_RX#[14]VSS182VSS255C21C32N29D2614DMI_CTX_PRX_P3DMI_TX[3]PEG_RX#[15]VSS183VSS256N28D20VSS184VSS257J33N27D17PEG_RX[0]VSS185VSS258L35N26C34PEG_RX[1]VSS186VSS259K34M34C31PEG_RX[2]VSS187VSS260FDI_CTX_PRX_N0A21H35L33C2814FDI_CTX_PRX_N0FDI0_TX#[0]PEG_RX[3]VSS188VSS261FDI_CTX_PRX_N1H19H32L30C2714FDI_CTX_PRX_N1FDI0_TX#[1]PEG_RX[4]VSS189VSS262FDI_CTX_PRX_N2E19G34L27C2514FDI_CTX_PRX_N2FDI0_TX#[2]PEG_RX[5]VSS190VSS263FDI_CTX_PRX_N3F18G31L9C2314FDI_CTX_PRX_N3FDI0_TX#[3]PEG_RX[6]VSS191VSS264FDI_CTX_PRX_N4B21F33L8C1014FDI_CTX_PRX_N4FDI1_TX#[0]PEG_RX[7]VSS192VSS265FDI_CTX_PRX_N5C20F30L6C114FDI_CTX_PRX_N5FDI1_TX#[1]PEG_RX[8]VSS193VSS266FDI_CTX_PRX_N6D18E35L5B2214FDI_CTX_PRX_N6FDI1_TX#[2]PEG_RX[9]VSS194VSS267CFDI_CTX_PRX_N7E17E33L4B19C14FDI_CTX_PRX_N7FDI1_TX#[3]PEG_RX[10]VSS195VSS268F32L3B17PEG_RX[11]VSS196VSS269D34L2VSSB15PEG_RX[12]VSS197VSS270FDI_CTX_PRX_P0A22E31L1B1314FDI_CTX_PRX_P0FDI0_TX[0]PEG_RX[13]VSS198VSS271FDI_CTX_PRX_P1G19C33K35B1114FDI_CTX_PRX_P1FDI0_TX[1]PEG_RX[14]VSS199VSS272FDI_CTX_PRX_P2E20B32K32B914FDI_CTX_PRX_P2FDI0_TX[2]PEG_RX[15]VSS200VSS273FDI_CTX_PRX_P3G18K29B814FDI_CTX_PRX_P3FDI0_TX[3]VSS201VSS274FDI_CTX_PRX_P4B20M29K26B714FDI_CTX_PRX_P4FDI1_TX[0]PEG_TX#[0]VSS202VSS275FDI_CTX_PRX_P5C19M32J34B514FDI_CTX_PRX_P5FDI1_TX[1]PEG_TX#[1]VSS203VSS276FDI_CTX_PRX_P6D19M31J31B314FDI_CTX_PRX_P6FDI1_TX[2]PEG_TX#[2]VSS204VSS277FDI_CTX_PRX_P7F17L32H33B214FDI_CTX_PRX_P7FDI1_TX[3]PEG_TX#[3]VSS205VSS278L29H30A35FDI_FSYNC0PEG_TX#[4]VSS206VSS27914FDI_FSYNC0J18K31H27A32FDI0_FSYNCIntel(R)FDIPEG_TX#[5]VSS207VSS280FDI_FSYNC1J17K28H24A2914FDI_FSYNC1FDI1_FSYNCPEG_TX#[6]VSS208VSS281J30H21A26PEG_TX#[7]VSS209VSS282FDI_INTH20J28H18A2314FDI_INTFDI_INTPEG_TX#[8]VSS210VSS283H29H15A20PEG_TX#[9]VSS211VSS284FDI_LSYNC0J19G27H13A314FDI_LSYNC0FDI0_LSYNCPEG_TX#[10]VSS212VSS285FDI_LSYNC1H17E29H1014FDI_LSYNC1FDI1_LSYNCPEG_TX#[11]VSS213F27H9PEG_TX#[12]VSS214PCIEXPRESS*-GRAPHICSD28H8PEG_TX#[13]VSS215F26H7PEG_TX#[14]VSS216E25H6PEG_TX#[15]VSS217A18H5eDP_COMPIOVSS218A17M28H4eDP_ICOMPOPEG_TX[0]VSS219B16M33H3eDP_HPD#PEG_TX[1]VSS220RC224.9_0402_1%M30H2PEG_TX[2]VSS221EDP_COMPL31H1+V1.05S_VPEG_TX[3]VSS222C15L28G35eDP_AUXPEG_TX[4]VSS223D15K30G32eDP_AUX#PEG_TX[5]VSS224EDP_HPD#K27G29+V1.05S_VPEG_TX[6]VSS225J29G26PEG_TX[7]VSS226B10K_0402_5%C17J27G23BeDP_TX[0]PEG_TX[8]VSS227@RC8F16H28G20eDP_TX[1]PEG_TX[9]VSS228C16eDPG28G17eDP_TX[2]PEG_TX[10]VSS229G15E28G11eDP_TX[3]PEG_TX[11]VSS230F28F34PEG_TX[12]VSS231C18D27F31eDP_TX#[0]PEG_TX[13]VSS232E16E26F29eDP_TX#[1]PEG_TX[14]VSS233D16D25eDP_TX#[2]PEG_TX[15]F15eDP_TX#[3]TYCO_2013620-2_IVYBRIDGECONN@TYCO_2013620-2_IVYBRIDGECONN@AASecurityClassificationCompalSecretDataCompalElectronics,Inc.IssuedDate2011/05/23DecipheredDate2012/12/31TitlePROCESSOR(1/6)DMI,FDI,PEGTHISSHEETOFENGINEERINGDRAWINGISTHEPROPRIETARYPROPERTYOFCOMPALELECTRONICS,INC.ANDCONTAINSSizeDocumentNumberRevANDTRADESECRETINFORMATION.THISSHEETMAYNOTBETRANSFEREDFROMTHECUSTODYOFTHECOMPETENTDIVISIONOFR&DCustom0.1DEPARTMENTEXCEPTASAUTHORIZEDBYCOMPALELECTRONICS,INC.NEITHERTHISSHEETNORTHEINFORMATIONITCONTAINSQAL30LA-8061PMBMAYBEUSEDBYORDISDTOANYTHIRDPARTYWITHOUTPRIORWRITTENCONSENTOFCOMPALELECTRONICS,INC.Date:Friday,January13,2012Sheet4of46543215432114SYSTEM_PWROK+3V_PCH+3VS+3V_PCH+3VS0.1U_0402_16V4Z+1.5V_CPU_VDDQCC33RC12@RC13RC15RC1110K_0402_5%RC14200_0402_1%200_0402_1%0_0402_5%200_0402_1%@D5UC1D1B4VDDPWRGOODD_PWGVCCY14PM_DRAM_PWRGD2RC210_0402_5%AGMC74VHC1G09DFT2G_SC70-53@RC2539_0402_1%SSM3K7002FU_SC70-3@RC17QC29,34RUN_ON_CPU1.5VS3#1D0_0402_5%2G@RC16S34,40SUSP30_0402_5%+3VS+V1.05S_V0.1U_0402_16V4ZCC36RC3875_0402_5%CC51UC2RC35P24BUFO_CPU_RST#BUF_CPU_RST#15,23,24,28,29PLT_RST#NCAY43_0402_1%GSN74LVC1G07DCKR_SC70-53@RC40JCPU1B0_0402_5%ProcessorPullups+V1.05S_VT504@H_PROCHOT#RC44A28BCLKCLK_CPU_DMI1362_0402_5%C26A2716H_SNB_IVB#PROC_SELECT#BCLK#CLK_CPU_DMI#13T505@AN34SKTOCC#A16CLK_CPU_DPLL_RRC371K_0402_5%PU/PDforJTAGsignalsDPLL_REF_CLKCLK_CPU_DPLL#_RMISCA15RC411K_0402_5%DPLL_REF_CLK#+V1.05S_V+V1.05S_VT0501@H_CATERR#AL33CLOCKSCATERR#XDP_TMS_R51_0402_5%RC46H_CPUPWRGD10K_0402_5%RC45AN33R8H_DRAMRST#XDP_TDI_R51_0402_5%RC4716,29H_PECIPECISM_DRAMRST#H_DRAMRST#6DDR3CompensationSignalsXDP_PREQ#_R51_0402_5%@RC48RC42H_PROCHOT#_RAL32AK1SM_RCOMP0SM_RCOMP0140_0402_1%RC56XDP_TDO_R51_0402_5%RC4929,35H_PROCHOT#PROCHOT#SM_RCOMP[0]56_0402_5%A5SM_RCOMP1SM_RCOMP[1]BA4SM_RCOMP2SM_RCOMP125.5_0402_1%RC59BSM_RCOMP[2]DDR3MISCH_THERMTRIP#AN32SM_RCOMP2200_0402_1%RC61XDP_TCK_R51_0402_5%RC5316H_THERMTRIP#THERMTRIP#THERMALXDP_TRST#_R51_0402_5%RC55AP29XDP_PRDY#_RPRDY#AP27XDP_PREQ#_RPREQ#AR26XDP_TCK_RTCKAR27XDP_TMS_RTMSAM34AP30XDP_TRST#_R14H_PM_SYNCPM_SYNCTRST#AR28XDP_TDI_RTDIAP26XDP_TDO_RTDOAP3316H_CPUPWRGDUNCOREPWRGOODRC58AL35XDP_DBRESET#DBR#VDDPWRGOODVDDPWRGOOD_RV8130_0402_1%SM_DRAMPWROKAT28BPM#[0]AR29BPM#[1]AR30BPM#[2]BUF_CPU_RST#AR33JTAG&BPMAT30RESET#BPM#[3]AP32BPM#[4]AR31BPM#[5]AT31BPM#[6]AR32BPM#[7]PWRMANAGEMENTAATYCO_2013620-2_IVYBRIDGECONN@SecurityClassificationCompalSecretDataCompalElectronics,Inc.IssuedDate2011/05/23DecipheredDate2012/12/31TitlePROCESSOR(2/6)PM,XDP,CLKTHISSHEETOFENGINEERINGDRAWINGISTHEPROPRIETARYPROPERTYOFCOMPALELECTRONICS,INC.ANDCONTAINSSizeDocumentNumberRevANDTRADESECRETINFORMATION.THISSHEETMAYNOTBETRANSFEREDFROMTHECUSTODYOFTHECOMPETENTDIVISIONOFR&DCustom0.1DEPARTMENTEXCEPTASAUTHORIZEDBYCOMPALELECTRONICS,INC.NEITHERTHISSHEETNORTHEINFORMATIONITCONTAINSQAL30LA-8061PMBMAYBEUSEDBYORDISDTOANYTHIRDPARTYWITHOUTPRIORWRITTENCONSENTOFCOMPALELECTRONICS,INC.Date:Friday,January13,2012Sheet5of465432154321JCPU1CJCPU1DAB610DDR_A_D[0..63]SA_CLK[0]DDRA_CLK010AA6SA_CLK#[0]DDRA_CLK0#10DDDR_A_D0C5V9AE2DSA_DQ[0]SA_CKE[0]DDRA_CKE01011DDR_B_D[0..63]SB_CLK[0]DDRB_CLK011DDR_A_D1D5AD2SA_DQ[1]SB_CLK#[0]DDRB_CLK0#11DDR_A_D2D3DDR_B_D0C9R9SA_DQ[2]SB_DQ[0]SB_CKE[0]DDRB_CKE011DDR_A_D3D2DDR_B_D1A7SA_DQ[3]SB_DQ[1]DDR_A_D4D6AA5DDR_B_D2D10SA_DQ[4]SA_CLK[1]DDRA_CLK110SB_DQ[2]DDR_A_D5C6AB5DDR_B_D3C8SA_DQ[5]SA_CLK#[1]DDRA_CLK1#10SB_DQ[3]DDR_A_D6C2V10DDR_B_D4A9AE1SA_DQ[6]SA_CKE[1]DDRA_CKE110SB_DQ[4]SB_CLK[1]DDRB_CLK111DDR_A_D7C3DDR_B_D5A8AD1SA_DQ[7]SB_DQ[5]SB_CLK#[1]DDRB_CLK1#11DDR_A_D8F10DDR_B_D6D9R10SA_DQ[8]SB_DQ[6]SB_CKE[1]DDRB_CKE111DDR_A_D9F8DDR_B_D7D8SA_DQ[9]SB_DQ[7]DDR_A_D10G10AB4DDR_B_D8G4SA_DQ[10]RSVD_TP[1]SB_DQ[8]DDR_A_D11G9AA4DDR_B_D9F4SA_DQ[11]RSVD_TP[2]SB_DQ[9]DDR_A_D12F9W9DDR_B_D10F1AB2SA_DQ[12]RSVD_TP[3]SB_DQ[10]RSVD_TP[11]DDR_A_D13F7DDR_B_D11G1AA2SA_DQ[13]SB_DQ[11]RSVD_TP[12]DDR_A_D14G8DDR_B_D12G5T9SA_DQ[14]SB_DQ[12]RSVD_TP[13]DDR_A_D15G7DDR_B_D13F5SA_DQ[15]SB_DQ[13]DDR_A_D16K4AB3DDR_B_D14F2SA_DQ[16]RSVD_TP[4]SB_DQ[14]DDR_A_D17K5AA3DDR_B_D15G2SA_DQ[17]RSVD_TP[5]SB_DQ[15]DDR_A_D18K1W10DDR_B_D16J7AA1SA_DQ[18]RSVD_TP[6]SB_DQ[16]RSVD_TP[14]DDR_A_D19J1DDR_B_D17J8AB1SA_DQ[19]SB_DQ[17]RSVD_TP[15]DDR_A_D20J5DDR_B_D18K10T10SA_DQ[20]SB_DQ[18]RSVD_TP[16]DDR_A_D21J4DDR_B_D19K9SA_DQ[21]SB_DQ[19]DDR_A_D22J2AK3DDR_B_D20J9SA_DQ[22]SA_CS#[0]DDRA_SCS0#10SB_DQ[20]DDR_A_D23K2AL3DDR_B_D21J10SA_DQ[23]SA_CS#[1]DDRA_SCS1#10SB_DQ[21]DDR_A_D24M8AG1DDR_B_D22K8AD3SA_DQ[24]RSVD_TP[7]SB_DQ[22]SB_CS#[0]DDRB_SCS0#11DDR_A_D25N10AH1DDR_B_D23K7AE3SA_DQ[25]RSVD_TP[8]SB_DQ[23]SB_CS#[1]DDRB_SCS1#11DDR_A_D26N8DDR_B_D24M5AD6SA_DQ[26]SB_DQ[24]RSVD_TP[17]DDR_A_D27N7DDR_B_D25N4AE6SA_DQ[27]SB_DQ[25]RSVD_TP[18]DDR_A_D28M10DDR_B_D26N2SA_DQ[28]SB_DQ[26]DDR_A_D29M9AH3DDR_B_D27N1SA_DQ[29]SA_ODT[0]DDRA_ODT010SB_DQ[27]DDR_A_D30N9AG3DDR_B_D28M4SA_DQ[30]SA_ODT[1]DDRA_ODT110SB_DQ[28]DDR_A_D31M7AG2DDR_B_D29N5AE4SA_DQ[31]RSVD_TP[9]SB_DQ[29]SB_ODT[0]DDRB_ODT011DDR_A_D32AG6AH2DDR_B_D30M2AD4SA_DQ[32]RSVD_TP[10]SB_DQ[30]SB_ODT[1]DDRB_ODT111DDR_A_D33AG5DDR_B_D31M1AD5SA_DQ[33]SB_DQ[31]RSVD_TP[19]DDR_A_D34AK6DDR_B_D32AM5AE5CSA_DQ[34]SB_DQ[32]RSVD_TP[20]CDDR_A_D35AK5DDR_B_D33AM6SA_DQ[35]SB_DQ[33]DDR_A_D36AH5DDR_B_D34AR3SA_DQ[36]DDR_A_DQS#[0..7]10SB_DQ[34]DDR_A_D37AH6C4DDR_A_DQS#0DDR_B_D35AP3SA_DQ[37]SA_DQS#[0]SB_DQ[35]DDR_A_D38AJ5G6DDR_A_DQS#1DDR_B_D36AN3SA_DQ[38]SA_DQS#[1]SB_DQ[36]DDR_B_DQS#[0..7]11DDR_A_D39AJ6J3DDR_A_DQS#2DDR_B_D37AN2D7DDR_B_DQS#0SA_DQ[39]SA_DQS#[2]SB_DQ[37]SB_DQS#[0]DDR_A_D40AJ8M6DDR_A_DQS#3DDR_B_D38AN1F3DDR_B_DQS#1SA_DQ[40]SA_DQS#[3]SB_DQ[38]SB_DQS#[1]DDR_A_D41AK8AL6DDR_A_DQS#4DDR_B_D39AP2K6DDR_B_DQS#2SA_DQ[41]SA_DQS#[4]SB_DQ[39]SB_DQS#[2]DDR_A_D42AJ9AM8DDR_A_DQS#5DDR_B_D40AP5N3DDR_B_DQS#3SA_DQ[42]SA_DQS#[5]SB_DQ[40]SB_DQS#[3]DDR_A_D43AK9AR12DDR_A_DQS#6DDR_B_D41AN9AN5DDR_B_DQS#4SA_DQ[43]SA_DQS#[6]SB_DQ[41]SB_DQS#[4]DDR_A_D44AH8AM15DDR_A_DQS#7DDR_B_D42AT5AP9DDR_B_DQS#5SA_DQ[44]SA_DQS#[7]SB_DQ[42]SB_DQS#[5]DDR_A_D45AH9DDR_B_D43AT6AK12DDR_B_DQS#6SA_DQ[45]SB_DQ[43]SB_DQS#[6]DDR_A_D46AL9DDR_B_D44AP6AP15DDR_B_DQS#7SA_DQ[46]SB_DQ[44]SB_DQS#[7]DDR_A_D47AL8DDR_B_D45AN8SA_DQ[47]SB_DQ[45]DDR_A_D48AP11DDR_B_D46AR6SA_DQ[48]DDR_A_DQS[0..7]10SB_DQ[46]DDR_A_D49AN11D4DDR_A_DQS0DDR_B_D47AR5SA_DQ[49]SA_DQS[0]SB_DQ[47]DDR_A_D50AL12F6DDR_A_DQS1DDR_B_D48AR9SA_DQ[50]SA_DQS[1]SB_DQ[48]DDR_B_DQS[0..7]11DDR_A_D51AM12K3DDR_A_DQS2DDR_B_D49AJ11C7DDR_B_DQS0SA_DQ[51]SA_DQS[2]SB_DQ[49]SB_DQS[0]DDR_A_D52AM11N6DDR_A_DQS3DDR_B_D50AT8G3DDR_B_DQS1SA_DQ[52]SA_DQS[3]SB_DQ[50]SB_DQS[1]DDR_A_D53AL11AL5DDR_A_DQS4DDR_B_D51AT9J6DDR_B_DQS2SA_DQ[53]SA_DQS[4]SB_DQ[51]SB_DQS[2]DDR_A_D54AP12AM9DDR_A_DQS5DDR_B_D52AH11M3DDR_B_DQS3SA_DQ[54]SA_DQS[5]SB_DQ[52]SB_DQS[3]DDR_A_D55AN12AR11DDR_A_DQS6DDR_B_D53AR8AN6DDR_B_DQS4SA_DQ[55]SA_DQS[6]SB_DQ[53]SB_DQS[4]DDR_A_D56AJ14AM14DDR_A_DQS7DDR_B_D54AJ12AP8DDR_B_DQS5SA_DQ[56]SA_DQS[7]SB_DQ[54]SB_DQS[5]DDR_A_D57AH14DDR_B_D55AH12AK11DDR_B_DQS6SA_DQ[57]AMEMORYSYSTEMDDRSB_DQ[55]SB_DQS[6]DDR_A_D58AL15DDR_B_D56AT11AP14DDR_B_DQS7SA_DQ[58]SB_DQ[56]SB_DQS[7]DDR_A_D59AK15DDR_B_D57AN14BMEMORYSYSTEMDDRSA_DQ[59]SB_DQ[57]DDR_A_D60AL14DDR_B_D58AR14SA_DQ[60]DDR_A_MA[0..15]10SB_DQ[58]DDR_A_D61AK14AD10DDR_A_MA0DDR_B_D59AT14SA_DQ[61]SA_MA[0]SB_DQ[59]DDR_A_D62AJ15W1DDR_A_MA1DDR_B_D60AT12SA_DQ[62]SA_MA[1]SB_DQ[60]DDR_B_MA[0..15]11DDR_A_D63AH15W2DDR_A_MA2DDR_B_D61AN15AA8DDR_B_MA0SA_DQ[63]SA_MA[2]SB_DQ[61]SB_MA[0]W7DDR_A_MA3DDR_B_D62AR15T7DDR_B_MA1SA_MA[3]SB_DQ[62]SB_MA[1]V3DDR_A_MA4DDR_B_D63AT15R7DDR_B_MA2SA_MA[4]SB_DQ[63]SB_MA[2]V2DDR_A_MA5T6DDR_B_MA3SA_MA[5]SB_MA[3]W3DDR_A_MA6T2DDR_B_MA4SA_MA[6]SB_MA[4]AE10W6DDR_A_MA7T4DDR_B_MA510DDR_A_BS0SA_BS[0]SA_MA[7]SB_MA[5]BAF10V1DDR_A_MA8T3DDR_B_MA6B10DDR_A_BS1SA_BS[1]SA_MA[8]SB_MA[6]V6W5DDR_A_MA9AA9R2DDR_B_MA710DDR_A_BS2SA_BS[2]SA_MA[9]11DDR_B_BS0SB_BS[0]SB_MA[7]AD8DDR_A_MA10AA7T5DDR_B_MA8SA_MA[10]11DDR_B_BS1SB_BS[1]SB_MA[8]V4DDR_A_MA11R6R3DDR_B_MA9SA_MA[11]11DDR_B_BS2SB_BS[2]SB_MA[9]W4DDR_A_MA12AB7DDR_B_MA10SA_MA[12]SB_MA[10]AE8AF8DDR_A_MA13R1DDR_B_MA1110DDR_A_CAS#SA_CAS#SA_MA[13]SB_MA[11]AD9V5DDR_A_MA14T1DDR_B_MA1210DDR_A_RAS#SA_RAS#SA_MA[14]SB_MA[12]AF9V7DDR_A_MA15AA10AB10DDR_B_MA1310DDR_A_WE#SA_WE#SA_MA[15]11DDR_B_CAS#SB_CAS#SB_MA[13]AB8R5DDR_B_MA1411DDR_B_RAS#SB_RAS#SB_MA[14]AB9R4DDR_B_MA1511DDR_B_WE#SB_WE#SB_MA[15]TYCO_2013620-2_IVYBRIDGECONN@TYCO_2013620-2_IVYBRIDGECONN@+1.5V@RC76RC750_0402_5%1K_0402_5%QC3H_DRAMRST#SDDDR3_DRAMRST#_R5H_DRAMRST#31SM_DRAMRST#10,11ASSM3K7002FU_SC70-3RC771K_0402_5%AG2RC784.99K_0402_1%DRAMRST_CNTRLDRAMRST_CNTRL_PCH13RC730_0402_5%SecurityClassificationCompalSecretDataCC37CompalElectronics,Inc.0.047U_0402_16V4ZIssuedDate2011/05/23DecipheredDate2012/12/31TitlePROCESSOR(3/6)DDRIIITHISSHEETOFENGINEERINGDRAWINGISTHEPROPRIETARYPROPERTYOFCOMPALELECTRONICS,INC.ANDCONTAINSSizeDocumentNumberRevANDTRADESECRETINFORMATION.THISSHEETMAYNOTBETRANSFEREDFROMTHECUSTODYOFTHECOMPETENTDIVISIONOFR&DCustom0.1DEPARTMENTEXCEPTASAUTHORIZEDBYCOMPALELECTRONICS,INC.NEITHERTHISSHEETNORTHEINFORMATIONITCONTAINSQAL30LA-8061PMBMAYBEUSEDBYORDISDTOANYTHIRDPARTYWITHOUTPRIORWRITTENCONSENTOFCOMPALELECTRONICS,INC.Date:Friday,January13,2012Sheet6of465432154321CFGStrapsforProcessorDDCFG2JCPU1ERC791K_0402_1%AH27@T0749VCC_DIE_SENSET1@CFG0AK28AH26@T0750CFG[0]VSS_DIE_SENSET2@CFG1AK29CFG[1]T3@CFG2AL26CFG[2]T4@CFG3AL27CFG[3]T5@CFG4AK26L7@T0704CFG[4]RSVD28T6@CFG5AL29AG7@T0705CFG[5]RSVD29PEGStaticLaneReversal-CFG2isforthe16xT7@CFG6AL30AE7@T0701CFG[6]RSVD30T8@CFG7AM31AK2@T0702CFG[7]RSVD31T9@CFG8AM32CFG[8]1:(Default)NormalOperation;Lane#T10@CFG9AM30W8@T0706CFG[9]RSVD32CFG2definitionmatchessocketpinmapdefinitionT11@CFG10AM28CFG[10]T12@CFG11AM26CFG[11]0:LaneReversedT13@CFG12AN28AT26@T0707CFG[12]CFGRSVD33T14@CFG13AN31AM33@T0708CFG[13]RSVD34T15@CFG14AN26AJ27@T0709CFG[14]RSVD35T16@CFG15AM27CFG4CFG[15]T17@CFG16AK31CFG[16]T18@CFG17AN29CFG[17]@RC821K_0402_1%T8@T0710RSVD37J16@T0711RSVD38AJ31H16@T0703VAXG_VAL_SENSERSVD39AH31G16@T0712VSSAXG_VAL_SENSERSVD40AJ33VCC_VAL_SENSEAH33CVSS_VAL_SENSECT0718@AJ26AR35@T0713RSVD5RSVD_NCTF1DisplayPortPresenceStrapAT34@T0714RSVD_NCTF2AT33@T0715RSVD_NCTF3AP35@T0716RSVD_NCTF41:Disabled;NoPhysicalDisplayPortAR34@T0717RSVD_NCTF5CFG4attachedtoEmbeddedDisplayPortT0724@F25RSVD80:Enabled;AnexternalDisplayPortdeviceisT0725@F24RSVD9connectedtotheEmbeddedDisplayPortT0726@F23RSVD10T0727@D24B34@T0719RSVD11RSVD_NCTF6T0729@G25A33@T0720RSVD12RSVD_NCTF7T0731@G24A34@T0721RSVD13RSVD_NCTF8T0732@E23B35@T0722CFG6RSVD14RSVD_NCTF9T0733@D23C35@T0723RSVD15RSVD_NCTF10T0734@C30CFG5RSVD16T0735@A31RSVD17T0736@B30RSVD18T0737@B29@RC83@RC84RSVD19T0738@D30AJ32@T07281K_0402_1%1K_0402_1%RSVD20RSVD51T0739@B31AK32@T0730RSVD21RSVD52T0740@A30RSVD22T0741@C29RSVD23AN35BCLK_ITPCLK_RES_ITP13T0742@J20AM35RSVD24BCLK_ITP#CLK_RES_ITP#13T0743@B18RSVD25T0747@J15AT2@T0744RSVD27RSVD_NCTF11PCIEPortBifurcationStrapsAT1@T0745RSVD_NCTF12BAR1@T0746BRSVD_NCTF1311:(Default)x16-Device1functions1and2disabledCFG[6:5]10:x8,x8-Device1function1enabled;function2B1@T0748KEYdisabled01:-(Device1function1disabled;function2enabled)00:x8,x4,x4-Device1functions1and2enabledTYCO_2013620-2_IVYBRIDGECONN@CFG7@RC851K_0402_1%PEGDEFERTRAINING1:(Default)PEGTrainimmediatelyCFG7followingRESETBdeassertion0:PEGWaitforBIOSfortrainingAASecurityClassificationCompalSecretDataCompalElectronics,Inc.IssuedDate2011/05/23DecipheredDate2012/12/31TitlePROCESSOR(4/6)RSVD,CFGTHISSHEETOFENGINEERINGDRAWINGISTHEPROPRIETARYPROPERTYOFCOMPALELECTRONICS,INC.ANDCONTAINSSizeDocumentNumberRevANDTRADESECRETINFORMATION.THISSHEETMAYNOTBETRANSFEREDFROMTHECUSTODYOFTHECOMPETENTDIVISIONOFR&DCustom0.1DEPARTMENTEXCEPTASAUTHORIZEDBYCOMPALELECTRONICS,INC.NEITHERTHISSHEETNORTHEINFORMATIONITCONTAINSQAL30LA-8061PMBMAYBEUSEDBYORDISDTOANYTHIRDPARTYWITHOUTPRIORWRITTENCONSENTOFCOMPALELECTRONICS,INC.Date:Friday,January13,2012Sheet7of465432154321JCPU1HJCPU1FPOWERAT35AJ22VSS1VSS81AT32AJ19VSS2VSS82AT29AJ16VSS3VSS83+V1.05S_VAT27AJ13VSS4VSS84AT25AJ10+VCC_COREVSS5VSS85AT22AJ7VSS6VSS86DAT19AJ48.5ADVSS7VSS87AT16AJ397AAG35VSS8VSS88VCC1AT13AJ2AG34AH13VSS9VSS89VCC2VCCIO1AT10AJ1AG33AH10VSS10VSS90VCC3VCCIO2AT7AH35AG32AG10VSS11VSS91VCC4VCCIO3AT4AH34AG31AC10VSS12VSS92VCC5VCCIO4AT3AH32AG30Y10VSS13VSS93VCC6VCCIO5AR25AH30AG29U10VSS14VSS94VCC7VCCIO6AR22AH29AG28P10VSS15VSS95VCC8VCCIO7AR19AH28AG27L10VSS16VSS96VCC9VCCIO8AR16AH25AG26J14VSS17VSS98VCC10VCCIO9AR13AH22AF35J13VSS18VSS99VCC11VCCIO10AR10AH19AF34J12VSS19VSS100VCC12VCCIO11AR7AH16AF33J11VSS20VSS101VCC13VCCIO12AR4AH7AF32H14VSS21VSS102VCC14VCCIO13AR2AH4AF31H12VSS2