首页 ADA4922-1高压差分ADC驱动器

ADA4922-1高压差分ADC驱动器

举报
开通vip

ADA4922-1高压差分ADC驱动器 High Voltage, Differential 18-Bit ADC Driver ADA4922-1 Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of pat...

ADA4922-1高压差分ADC驱动器
High Voltage, Differential 18-Bit ADC Driver ADA4922-1 Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved. FEATURES Single-ended-to-differential conversion Low distortion (VO, dm = 40 V p-p) −99 dBc HD at 100 kHz Low differential output referred noise: 12 nV/√Hz High input impedance: 11 MΩ Fixed gain of 2 No external gain components required Low output-referred offset voltage: 1.1 mV max Low input bias current: 3.5 μA max Wide supply range 5 V to 26 V Can produce differential output signals in excess of 40 V p-p High speed 38 MHz, −3 dB bandwidth @ 0.2 V p-p differential output Fast settling time 200 ns to 0.01% for 12 V step on ±5 V supplies Disable feature Available in space-saving, thermally enhanced packages 3 mm × 3 mm LFCSP 8-lead SOIC_EP Low supply current: IS = 10 mA on ±12 V supplies APPLICATIONS High voltage data acquisition systems Industrial instrumentation Spectrum analysis ATE Medical instruments FUNCTIONAL BLOCK DIAGRAM DIS NC = NO CONNECT 4 3 2 1 IN OUT–OUT+ VS+ REF NC VS– 7 8 5 6 ADA4922-1 05 68 1- 00 1 Figure 1. –84 –120 05 68 1- 01 2 FREQUENCY (kHz) D IS TO R TI O N (d B c) 1 10 100 –87 –90 –93 –102 –99 –96 –105 –108 –111 –114 –117 SECOND HARMONIC THIRD HARMONIC RL = 2kΩ VS = ±12V, VO, dm = 40V p-p VS = ±5V, VO, dm = 12V p-p Figure 2. Harmonic Distortion for Various Power Supplies GENERAL DESCRIPTION The ADA4922-1 is a differential driver for 16-bit to 18-bit ADCs that have differential input ranges up to ±20 V. Configured as an easy-to-use, single-ended-to-differential amplifier, the ADA4922-1 requires no external components to drive ADCs. The ADA4922-1 provides essential benefits such as low distortion and high SNR that are required for driving ADCs with resolutions up to 18 bits. With a wide supply voltage range (5 V to 26 V), high input impedance, and fixed differential gain of 2, the ADA4922-1 is designed to drive ADCs found to in a variety of applications, including industrial instrumentation. The ADA4922-1 is manufactured on ADI’s proprietary second- generation XFCB process that enables the amplifier to achieve excellent noise and distortion performance on high supply voltages. The ADA4922-1 is available in an 8-lead 3 mm × 3 mm LFCSP as well as an 8-lead SOIC package. Both packages are equipped with an exposed paddle for more efficient heat transfer. The ADA4922-1 is rated to work over the extended industrial temperature range, −40°C to +85°C. ADA4922-1 Rev. 0 | Page 2 of 20 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 5 Thermal Resistance ...................................................................... 5 ESD Caution.................................................................................. 5 Pin Configuration and Function Descriptions............................. 6 Typical Performance Characteristics ............................................. 7 Theory of Operation ...................................................................... 14 Applications..................................................................................... 16 ADA4922-1 Differential Output Noise Model .......................... 16 Using the REF Pin ...................................................................... 16 Internal Feedback Network Power Dissipation...................... 17 Disable Feature ........................................................................... 17 Driving a Differential Input ADC............................................ 17 Printed Circuit Board Layout Considerations ....................... 18 Outline Dimensions ....................................................................... 19 Ordering Guide .......................................................................... 20 REVISION HISTORY 10/05—Revision 0: Initial Version ADA4922-1 Rev. 0 | Page 3 of 20 SPECIFICATIONS VS = ±12 V, TA = 25°C, RL = 1 kΩ, DIS = HIGH, CL = 3 pF, unless otherwise noted. Table 1. Parameter Conditions Min Typ Max Unit DYNAMIC PERFORMANCE –3 dB Bandwidth G = +2, VO = 0.2 V p-p, differential 34 38 MHz G = +2, VO = 40 V p-p, differential 6.5 7.2 MHz Overdrive Recovery Time VS+ + 0.5 V to VS− − 0.5 V; +Recovery/−Recovery 180/330 ns Slew Rate VO, dm = 2 V step 260 V/μs VO, dm = 40 V step 730 V/μs Settling Time to 0.01% VO, dm = 40 V step 580 ns NOISE/DISTORTION PERFORMANCE Harmonic Distortion fC = 5 kHz, VO = 40 V p-p, RL = 2 kΩ, HD2/HD3 −116/−109 dBc fC = 100 kHz, VO = 40 V p-p, RL = 2 kΩ, HD2/HD3 −99/−100 dBc Differential Output Voltage Noise f = 100 kHz 12 nV/√Hz Input Current Noise f = 100 kHz 1.4 pA/√Hz DC PERFORMANCE Differential Output Offset Voltage 0.35 1.1 mV Differential Output Offset Voltage Drift 14 μV/°C Input Bias Current 1.8 3.5 μA Gain 2 V/V Gain Error −0.05 % Gain Error Drift 0.0002 %/°C INPUT CHARACTERISTICS Input Resistance 11 MΩ Input Capacitance 1 pF Input Voltage Range ±10.7 V OUTPUT CHARACTERISTICS Output Voltage Swing Each single-ended output, RL = 1 kΩ ±10.65 ±10.7 V DC Output Current 40 mA Capacitive Load Drive 30% overshoot 20 pF POWER SUPPLY Operating Range 5 26 V Quiescent Current 9.4 10.1 mA Quiescent Current (Disabled) 1.5 2.0 mA Power Supply Rejection Ratio (PSRR) −PSRR −89 −80 dB +PSRR −91 −83 dB DISABLE DIS Input Voltage Threshold Disabled ≤ −11 V Enabled ≥ −9 V Turn-Off Time 160 μs Turn-On Time 78 ns DIS Bias Current Enabled DIS = −9 V 114 μA Disabled DIS = −11 V −125 μA ADA4922-1 Rev. 0 | Page 4 of 20 VS = ±5 V, TA = 25°C, RL = 1 kΩ, DIS = HIGH, CL = 3 pF, unless otherwise noted. Table 2. Parameter Conditions Min Typ Max Unit DYNAMIC PERFORMANCE –3 dB Bandwidth G = +2, VO = 0.2 V p-p, differential 36 40.5 MHz G = +2, VO = 12 V p-p, differential 6.5 13.5 MHz Overdrive Recovery Time +Recovery/−Recovery 200/670 ns Slew Rate VO, dm = 2 V step 220 V/μs VO, dm = 12 V step 350 V/μs Settling Time to 0.01% VO, dm = 12 V step 200 ns NOISE/DISTORTION PERFORMANCE Harmonic Distortion fC = 5 kHz, VO = 12 V p-p, RL = 2 kΩ, HD2/HD3 −102/−108 dBc fC = 100 kHz, VO = 12 V p-p, RL = 2 kΩ, HD2/HD3 −101/−98 dBc Differential Output Voltage Noise f = 100 kHz 12 nV/√Hz Input Current Noise f = 100 kHz 1.4 pA/√Hz DC PERFORMANCE Differential Output Offset Voltage 0.4 1.2 mV Differential Output Offset Voltage Drift 12 μV/°C Input Bias Current 2.0 3.5 μA Gain 2 V/V Gain Error −0.05 % Gain Error Drift 0.0002 %/°C INPUT CHARACTERISTICS Input Resistance 11 MΩ Input Capacitance 1 pF Input Voltage Range ±3.6 V OUTPUT CHARACTERISTICS Output Voltage Swing Each single-ended output, RL = 1 kΩ ±3.55 ±3.6 V DC Output Current 40 mA Capacitive Load Drive 30% overshoot 20 pF POWER SUPPLY Operating Range 5 26 V Quiescent Current 7.0 7.6 mA Quiescent Current (Disabled) 0.7 1.6 mA Power Supply Rejection Ratio (PSRR) −PSRR −93 −82 dB +PSRR −91 −83 dB DISABLE DIS Input Voltage Disabled ≤ −4 V Enabled ≥ −2 V Turn-Off Time 160 μs Turn-On Time 78 ns DIS Bias Current Enabled DIS = −2 V 41 μA Disabled DIS = −4 V 49 μA ADA4922-1 Rev. 0 | Page 5 of 20 ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Rating Supply Voltage 26 V Power Dissipation See Figure 3 Storage Temperature Range –65°C to +125°C Operating Temperature Range –40°C to +85°C Lead Temperature Range (Soldering 10 sec) 300°C Junction Temperature 150°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. THERMAL RESISTANCE θJA is specified for the worst-case conditions, that is, θJA is specified for a device soldered in the circuit board with its exposed paddle soldered to a pad on the PCB surface that is thermally connected to a copper plane, with zero airflow. Table 4. Thermal Resistance Package Type θJA θJC Unit 8-Lead SOIC with EP on 4-layer board 79 25 °C/W 8-Lead LFCSP with EP on 4-layer board 81 17 °C/W Maximum Power Dissipation The maximum safe power dissipation in the ADA4922-1 package is limited by the associated rise in junction temperature (TJ) on the die. At approximately 150°C, which is the glass transition temperature, the plastic changes its properties. Even temporarily exceeding this temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric performance of the ADA4922-1. Exceeding a junction temperature of 150°C for an extended period can result in changes in the silicon devices potentially causing failure. The power dissipated in the package (PD) is the sum of the quiescent power dissipation and the power dissipated in the package due to the load drive for all outputs. The quiescent power is the voltage between the supply pins (VS) times the quiescent current (IS). The power dissipated due to the load drive depends upon the particular application. For each output, the power due to load drive is calculated by multiplying the load current by the associated voltage drop across the device. The power dissipated due to all of the loads is equal to the sum of the power dissipation due to each individual load. RMS voltages and currents must be used in these calculations. Airflow increases heat dissipation, effectively reducing θJA. In addition, more metal directly in contact with the package leads from metal traces, through holes, ground, and power planes reduces the θJA. The exposed paddle on the underside of the package must be soldered to a pad on the PCB surface that is thermally connected to a copper plane to achieve the specified θJA. Figure 3 shows the maximum safe power dissipation in the packages vs. the ambient temperature for the 8-lead SOIC (79°C/W) and for the 8-lead LFCSP (81°C/W) on a JEDEC standard 4-layer board, each with its underside paddle soldered to a pad that is thermally connected to a PCB plane. θJA values are approximations. 3.0 0 –40 80 05 68 1- 04 1 AMBIENT TEMPERATURE (°C) M A XI M U M P O W ER D IS SI PA TI O N (W ) 2.5 2.0 1.5 1.0 0.5 –20 0 20 40 60 SOIC LFCSP Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. ADA4922-1 Rev. 0 | Page 6 of 20 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS DIS NC = NO CONNECT 4 3 2 1 IN OUT–OUT+ VS+ REF NC VS– 7 8 5 6 ADA4922-1 05 68 1- 00 1 Figure 4. Pin Configuration Table 5. Pin Function Descriptions Pin No. Mnemonic Description 1 NC No Internal Connection 2 REF Reference Voltage for Single-Ended Input Signal 3 VS+ Positive Power Supply 4 OUT+ Noninverting Side of Differential Output 5 OUT− Inverting Side of Differential Output 6 VS− Negative Power Supply 7 DIS Disable 8 IN Single-Ended Signal Input ADA4922-1 Rev. 0 | Page 7 of 20 TYPICAL PERFORMANCE CHARACTERISTICS Unless otherwise noted, VS = ±12 V, RL, dm = 1 kΩ, REF = 0 V, DIS = HIGH, TA = 25°C. 3 –30 1 1000 05 68 1- 01 3 FREQUENCY (MHz) N O R M A LI ZE D C LO SE D -L O O P G A IN (d B ) 10 100 0 –3 –6 –9 –12 –15 –18 –21 –24 –27 VO, dm = 0.2V p-p VS = ±12V VS = ±5V Figure 5. Small Signal Frequency Response for Various Power Supplies 3 –30 1 1000 05 68 1- 01 4 FREQUENCY (MHz) N O R M A LI ZE D C LO SE D -L O O P G A IN (d B ) 10 100 0 –3 –6 –9 –12 –15 –18 –21 –24 –27 VO, dm = 0.2V p-p VS = ±12V @ +85°C VS = ±12V @ +25°C VS = ±12V @ –40°C VS = ±5V @ +85°C VS = ±5V @ +25°C VS = ±5V @ –40°C Figure 6. Small Signal Frequency Response for Various Temperatures and Supplies 3 –30 1 1000 05 68 1- 01 5 FREQUENCY (MHz) N O R M A LI ZE D C LO SE D -L O O P G A IN (d B ) 10 100 0 –3 –6 –9 –12 –15 –18 –21 –24 –27 VS = ±12V RL, dm = 1kΩ VS = ±5V RL, dm = 1kΩ VS = ±12V RL, dm = 500Ω VS = ±5V RL, dm = 500Ω VO, dm = 0.2V p-p Figure 7. Small Signal Frequency Response for Various Resistive Loads and Supplies 3 –30 05 68 1- 01 6 FREQUENCY (MHz) N O R M A LI ZE D C LO SE D -L O O P G A IN (d B ) 0 –3 –6 –9 –12 –15 –18 –21 –24 –27 1 10 100 VS = ±5V, VO, dm = 12V p-p VS = ±12V, VO, dm = 40V p-p Figure 8. Large Signal Frequency Response for Various Power Supplies 3 –30 1 100 05 68 1- 01 7 FREQUENCY (MHz) N O R M A LI ZE D C LO SE D -L O O P G A IN (d B ) 0 –3 –6 –9 –12 –15 –18 –21 –24 –27 10 (ALL VOLTAGES ARE VO, dm) 40V p-p +85°C 40V p-p +25°C 40V p-p –40°C 12V p-p +85°C 12V p-p +25°C 12V p-p –40°C VO, dm = 12V p-p (VS = ±5V) VO, dm = 40V p-p (VS = ±12V) Figure 9. Large Signal Frequency Response at Various Temperatures and Supplies 3 –30 1 100 05 68 1- 01 8 FREQUENCY (MHz) N O R M A LI ZE D C LO SE D -L O O P G A IN (d B ) 0 –3 –6 –9 –12 –15 –18 –21 –24 –27 10 VS = ±12V, RL, dm = 1kΩ VS = ±5V, RL, dm = 1kΩ VS = ±12V, RL, dm = 500Ω VS = ±5V, RL, dm = 500Ω VO, dm = 12V p-p (VS = ±5V) VO, dm = 40V p-p (VS = ±12V) Figure 10. Large Signal Frequency Response for Various Resistive Loads and Supplies ADA4922-1 Rev. 0 | Page 8 of 20 3 –30 1 1000 05 68 1- 01 9 FREQUENCY (MHz) N O R M A LI ZE D C LO SE D -L O O P G A IN (d B ) 10 100 0 –3 –6 –9 –12 –15 –18 –21 –24 –27 VO, dm = 0.2V p-p VS = ±5V, CL, dm = 10pF VS = ±5V, CL, dm = 20pF VS = ±12V, CL, dm = 0pF VS = ±12V, CL, dm = 20pF Figure 11. Small Signal Frequency Response for Various Capacitive Loads 3 –33 1 1000 05 68 1- 02 0 FREQUENCY (MHz) N O R M A LI ZE D G A IN (d B ) 10 100 0 –3 –6 –9 –12 –15 –18 –21 –24 –27 –30 10V p-p 12V p-p 16V p-p 0.2V p-p 2V p-p Figure 12. Frequency Response for Various Output Amplitudes, VS = ±5 V –50 –120 1000 05 68 1- 01 1 FREQUENCY (MHz) IS O LA TI O N (d B ) 1 10 100 –60 –70 –80 –90 –100 –110 VIN = 0.1V p-p DIS = LOW VS = ±12V VS ±5V Figure 13. Isolation vs. Frequency—Disabled 3 –30 1 100 05 68 1- 05 0 FREQUENCY (MHz) N O R M A LI ZE D C LO SE D -L O O P G A IN (d B ) 0 –3 –6 –9 –12 –15 –18 –21 –24 –27 10 VS = ±5V, VIN = 12V p-p, CL, dm = 0pF VS = ±12V, VIN = 40V p-p, CL, dm = 0pF VS = ±5V, VIN = 12V p-p, CL, dm = 20pF VS = ±12V, VIN = 40V p-p, CL, dm = 20pF Figure 14. Large Signal Frequency Response for Various Capacitive Loads 3 –33 1 1000 05 68 1- 02 3 FREQUENCY (MHz) N O R M A LI ZE D G A IN (d B ) 10 100 0 –3 –6 –9 –12 –15 –18 –21 –24 –27 –30 0.2V p-p 2V p-p 40V p-p 20V p-p 10V p-p Figure 15. Frequency Response for Various Output Amplitudes, VS = ±12 V 3 –30 1 1000 05 68 1- 02 4 FREQUENCY (MHz) N O R M A LI ZE D C LO SE D -L O O P G A IN (d B ) 10 100 0 –3 –6 –9 –12 –15 –18 –21 –24 –27 VREF = 0.1V p-p VS = ±5V VS = ±12V Figure 16. REF Small Signal Frequency Response for Various Power Supplies ADA4922-1 Rev. 0 | Page 9 of 20 –84 –120 05 68 1- 01 2 FREQUENCY (kHz) D IS TO R TI O N (d B c) 1 10 100 –87 –90 –93 –102 –99 –96 –105 –108 –111 –114 –117 SECOND HARMONIC THIRD HARMONIC RL = 2kΩ VS = ±12V, VO, dm = 40V p-p VS = ±5V, VO, dm = 12V p-p Figure 17. Harmonic Distortion for Various Power Supplies –60 –140 47 05 68 1- 02 1 OUTPUT AMPLITUDE (V p-p) D IS TO R TI O N (d B c) 72 221712 42373227 –70 –80 –90 –120 –100 –130 –110 SECOND HARMONIC THIRD HARMONIC RL = 2kΩ VS = ±12V VS = ±5V Figure 18. Harmonic Distortion vs. Output Amplitude and Supply Voltage (f =10 kHz) 0 –100 05 68 1- 02 5 FREQUENCY (MHz) PS R R (d B ) 0.001 0.01 10010.1 10 –10 –20 –70 –60 –40 –30 –80 –90 –50 –PSRR +PSRR Figure 19. PSRR vs. Frequency –84 –120 05 68 1- 02 2 FREQUENCY (kHz) D IS TO R TI O N (d B c) 1 10010 –87 –90 –93 –111 –108 –102 –99 –96 –114 –117 –105 SECOND HARMONIC THIRD HARMONIC VS = ±12V VO, dm = 40V p-p RL = 600Ω RL = 1kΩ RL = 2kΩ Figure 20. Harmonic Distortion for Various Loads 100 0.01 0.001 100 05 68 1- 03 0 FREQUENCY (MHz) IM PE D A N C E (Ω ) 0.01 0.1 1 10 0.1 1 10 VON VS = ±5V VOP VS = ±5V VOP VS = ±12V VON VS = ±12V Figure 21. Single-Ended Output Impedance vs. Frequency and Supplies ADA4922-1 Rev. 0 | Page 10 of 20 100 0 1 100M 05 68 1- 03 2 FREQUENCY (Hz) D IF FE R EN TI A L VO LT A G E N O IS E (R TO ) ( nV / H z) 10 100 1k 10k 100k 1M 10M 90 80 70 60 50 40 30 20 10 Figure 22. Differential Output Noise vs. Frequency 0.12 –0.12 05 68 1- 03 3 O U TP U T VO LT A G E (V ) 0.10 0.08 0.06 0.04 0.02 0 –0.02 –0.04 –0.06 –0.08 –0.10 VS = ±5V VS = ±12V 20ns/DIV Figure 23. Small Signal Transient Response for Various Power Supplies 0.125 –0.125 05 68 1- 03 7 O U TP U T VO LT A G E (V ) 0.100 0.075 0.050 0.025 0 –0.025 –0.050 –0.075 –0.100 CL = 0pF CL = 10pF CL = 20pF 5ns/DIV Figure 24. Small Signal Transient Response for Various Capacitive Loads 50 0 05 68 1- 02 6 FREQUENCY (Hz) IN PU T C U R R EN T N O IS E (p A /√H z) 1 10 1100k1k100 10k 45 40 15 20 30 35 10 5 25 M Figure 25. Input Current Noise vs. Frequency 22 –22 05 68 1- 02 7 O U TP U T VO LT A G E (V ) 18 14 10 6 2 –2 –6 –10 –14 –18 TIME (μs) 100ns/DIV CL = 20pF VOUT = 40V p-p Figure 26. Large Signal Transient Response for Various Power Supplies 22 –22 05 68 1- 04 0 O U TP U T VO LT A G E (V ) 18 14 10 6 2 –2 –6 –10 –14 –18 2
本文档为【ADA4922-1高压差分ADC驱动器】,请使用软件OFFICE或WPS软件打开。作品中的文字与图均可以修改和编辑, 图片更改请在作品中右键图片并更换,文字修改请直接点击文字进行修改,也可以新增和删除文档中的内容。
该文档来自用户分享,如有侵权行为请发邮件ishare@vip.sina.com联系网站客服,我们会及时删除。
[版权声明] 本站所有资料为用户分享产生,若发现您的权利被侵害,请联系客服邮件isharekefu@iask.cn,我们尽快处理。
本作品所展示的图片、画像、字体、音乐的版权可能需版权方额外授权,请谨慎使用。
网站提供的党政主题相关内容(国旗、国徽、党徽..)目的在于配合国家政策宣传,仅限个人学习分享使用,禁止用于任何广告和商用目的。
下载需要: 免费 已有0 人下载
最新资料
资料动态
专题动态
is_439741
暂无简介~
格式:pdf
大小:418KB
软件:PDF阅读器
页数:0
分类:工学
上传时间:2013-08-29
浏览量:25