121122_CAS_LC550EUN-SFM1_통합등급

Product Specification LC550EUN Ver. 0.1 Title 55.0” WUXGA TFT LCD BUYER KDP MODEL SUPPLIER LG Display Co., Ltd. *MODEL LC550EUN SUFFIX SFM1 (RoHS Verified) *When you obtain standard approval, please use the above model name without suffix SPECIFICATION FOR APPROVAL APPROVED BY SIGNATURE DATE Y.S. Park / Team Leader REVIEWED BY K.Y. Chong / Project Leader PREPARED BY J.S. Bae / Engineer TV Product Development Dept. LG Display Co., Ltd. APPROVED BY SIGNATURE DATE / / / Please return 1 copy for your confirmation with your signature and comments. ( ) Preliminary Specification (● ) Final Specification Product Specification LC550EUN Ver. 0.1 1 /36 CONTENTS Number ITEM Page COVER 0 CONTENTS 1 RECORD OF REVISIONS 2 1 GENERAL DESCRIPTION 3 2 ABSOLUTE MAXIMUM RATINGS 4 3 ELECTRICAL SPECIFICATIONS 5 3-1 ELECTRICAL CHARACTERISTICS 5 3-2 INTERFACE CONNECTIONS 7 3-3 SIGNAL TIMING SPECIFICATIONS 9 3-4 SIGNAL TIMING WAVEFORMS 11 3-5 COLOR DATA REFERENCE 14 3-6 POWER SEQUENCE 15 4 OPTICAL SPECIFICATIONS 17 5 MECHANICAL CHARACTERISTICS 21 6 RELIABILITY 24 7 INTERNATIONAL STANDARDS 25 7-1 SAFETY 25 7-2 EMC 25 7-3 ENVIRONMENT 25 8 PACKING 26 8-1 DESIGNATION OF LOT MARK 26 8-2 PACKING FORM 26 9 PRECAUTIONS 27 9-1 MOUNTING PRECAUTIONS 27 9-2 OPERATING PRECAUTIONS 27 9-3 ELECTROSTATIC DISCHARGE CONTROL 28 9-4 PRECAUTIONS FOR STRONG LIGHT EXPOSURE 28 9-5 STORAGE 28 Product Specification LC550EUN Ver. 0.1 2 /36 Revision No. Revision Date Page Description 0.1 Nov,22, 2012 - Preliminary Specification(First Draft) RECORD OF REVISIONS Product Specification LC550EUN Ver. 0.1 General Features Active Screen Size 54.64 inches(1387.80mm) diagonal Outline Dimension 1244.6(H) × 720.9(V) × 9.9(B) / 22.6(D) mm (Typ.) Pixel Pitch 0.630 mm x 0.630 mm Pixel Format 1920 horiz. by 1080 vert. Pixels, RGB stripe arrangement Color Depth 8bit, 16.7 Million colors Luminance, White 350 cd/m2 (Center 1point ,Typ.) Viewing Angle (CR>10) Viewing angle free ( R/L 178 (Min.), U/D 178 (Min.)) Power Consumption Total 87.58W (Typ.) [Logic= 6.88W, LED Driver=80.7W(ExtVbr_B=100% )] Weight 16.5Kg (Typ.) Display Mode Transmissive mode, Normally black Surface Treatment Hard coating(3H), Anti-glare treatment of the front polarizer (Haze 1%(Typ.)) 1. General Description The LC550EUN is a Color Active Matrix Liquid Crystal Display with an integral Light Emitting Diode (LED) backlight system. The matrix employs a-Si Thin Film Transistor as the active element. It is a transmissive display type which is operating in the normally black mode. It has a 54.64 inch diagonally measured active display area with WUXGA resolution (1080 vertical by 1920 horizontal pixel array). Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arrayed in vertical stripes. Gray scale or the luminance of the sub-pixel color is determined with a 8-bit gray scale signal for each dot. Therefore, it can present a palette of more than 16.7Milion colors. It has been designed to apply the 8-bit 2-port LVDS interface. It is intended to support LCD TV, PCTV where high brightness, super wide viewing angle, high color gamut, high color depth and fast response time are important. Source Driver Circuit TFT - LCD Panel (1920 × RGB × 1080 pixels) [Gate In Panel] G1 S1 S1920 G1080 EPI(RGB) Control Signals Power Signals Scanning Block 2 Scanning Block 1 Scanning Block 3 LED Driver+24.0V, GND, On/Off Timing Controller LVDS Rx + OPC + DGA Integrated EEPROM Power Circuit Block SDASCL LVDS Select OPC Enable CN1 (51pin) LVDS 2Port +12.0V LVDS 1,2 Option signal I2CExtVBR-B PWM_OUT 1~3 PWM_OUT 1~3 CN2 (4 pin) 3 /36 Product Specification LC550EUN Ver. 0.1 4 /36 The following items are maximum values which, if exceeded, may cause faulty operation or permanent damage to the LCD module. 2. Absolute Maximum Ratings Table 1. ABSOLUTE MAXIMUM RATINGS 1. Ambient temperature condition (Ta = 25 ± 2 °C ) 2. Temperature and relative humidity range are shown in the figure below. Wet bulb temperature should be Max 39°C, and no condensation of water. 3. Gravity mura can be guaranteed below 40°C condition. 4. The maximum operating temperatures is based on the test condition that the surface temperature of display area is less than or equal to 68°C with LCD module alone in a temperature controlled chamber. Thermal management should be considered in final product design to prevent the surface temperature of display area from being over 68℃. The range of operating temperature may be degraded in case of improper thermal management in final product design. 90% 10 20 30 40 50 60 70 800-20 0 10 20 30 40 50 Dry Bulb Temperature [°C] Wet Bulb Temperature [°C] Storage Operation H u m id it y [ (% )R H ] 10% 40% 60% 60 Parameter Symbol Value Unit Note Min Max Power Input Voltage LCD Circuit VLCD -0.3 +14.0 VDC 1 Driver VBL -0.3 + 27.0 VDC Driver Control Voltage ON/OFF VOFF / VON -0.3 +5.5 VDC Brightness EXTVBR-B -0.3 +4.0 VDC T-Con Option Selection Voltage VLOGIC -0.3 +4.0 VDC Operating Temperature TOP 0 +50 °C 2,3 Storage Temperature TST -20 +60 °C Panel Front Temperature TSUR - +68 °C 4 Operating Ambient Humidity HOP 10 90 %RH 2,3 Storage Humidity HST 10 90 %RH Note Product Specification LC550EUN Ver. 0.1 5 /36 3. Electrical Specifications 3-1. Electrical Characteristics It requires two power inputs. One is employed to power for the LCD circuit. The other Is used for the LED backlight and LED Driver circuit. Table 2. ELECTRICAL CHARACTERISTICS 1. The specified current and power consumption are under the VLCD=12.0V, Ta=25 ± 2°C, fV=60Hz condition, and mosaic pattern(8 x 6) is displayed and fV is the frame frequency. 2. The current is specified at the maximum current pattern. 3. The duration of rush current is about 2ms and rising time of power input is 0.5ms (min.). 4. ExtVBR-B signal have to input available duty range and sequence. After Driver ON signal is applied, ExtVBR-B should be sustained from 5% to 100% more than 500ms. After that, ExtVBR-B 1% and 100% is possible For more information, please see 3-6-2. Sequence for LED Driver. 5. Ripple voltage level is recommended under ±5% of typical voltage Mosaic Pattern(8 x 6) White : 255 Gray Black : 0 Gray Note Parameter Symbol Value Unit Note Min Typ Max Circuit : Power Input Voltage VLCD 10.8 12.0 13.2 VDC Power Input Current ILCD - 573 745 mA 1 - 840 1092 mA 2 Power Consumption PLCD 6.88 8.94 Watt 1 Rush current IRUSH - - 5.0 A 3 Brightness Adjust for Back Light ExtVBR-B 5 - 100 % On Duty 41 - 100 % ExtVBR-B Frequency 40 50/60 80 Hz Pulse Duty Level (PWM) High Level 2.5 - 3.6 Vdc HIGH : on duty LOW : off dutyLow Level 0 - 0.8 Vdc Product Specification LC550EUN Ver. 0.1 6 /36 Table 3. ELECTRICAL CHARACTERISTICS (Continue) Notes : 1. Electrical characteristics are determined after the unit has been ‘ON’ and stable for approximately 60 minutes at 25±2°C. The specified current and power consumption are under the typical supply Input voltage 24Vand VBR (ExtVBR-B : 100%), it is total power consumption. 2. The life time (MTTF) is determined as the time which luminance of the LED is 50% compared to that of initial value at the typical LED current (ExtVBR-B :100%) on condition of continuous operating in LCM state at 25±2°C. 3. The duration of rush current is about 200ms. This duration is applied to LED on time. 4. Even though inrush current is over the specified value, there is no problem if I2T spec of fuse is satisfied. Parameter Symbol Values Unit Notes Min Typ Max LED Driver : Power Supply Input Voltage VBL 22.8 24.0 25.2 Vdc 1 Power Supply Input Current IBL - 3.36 3.62 A 1 Power Supply Input Current (In-Rush) In-rush - - 6.0 A VBL = 22.8V ExtVBR-B = 100% 3 Power Consumption PBL - 80.7 86.9 W 1 Input Voltage for Control System Signals On/Off On V on 2.5 - 5.0 Vdc Off V off -0.3 0.0 0.7 Vdc LED : Life Time 30,000 50,000 Hrs 2 Product Specification LC550EUN Ver. 0.1 7 /36 3-2. Interface Connections This LCD module employs two kinds of interface connection, 51-pin connector is used for the module electronics and 14-pin connector is used for the integral backlight system. 3-2-1. LCD Module Table 4. MODULE CONNECTOR(CN1) PIN CONFIGURATION Note No Symbol Description No Symbol Description 1 NC No Connection (Note 4) 27 NC No connection 2 NC No Connection (Note 4) 28 R2AN SECOND LVDS Receiver Signal (A-) 3 NC No Connection (Note 4) 29 R2AP SECOND LVDS Receiver Signal (A+) 4 NC No Connection (Note 4) 30 R2BN SECOND LVDS Receiver Signal (B-) 5 NC No Connection (Note 4) 31 R2BP SECOND LVDS Receiver Signal (B+) 6 NC No Connection (Note 4) 32 R2CN SECOND LVDS Receiver Signal (C-) 7 LVDS Select ‘H’ =JEIDA , ‘L’ or NC = VESA 33 R2CP SECOND LVDS Receiver Signal (C+) 8 ExtVBR-B External PWM (from System) 34 GND Ground 9 NC No Connection (Note 4) 35 R2CLKN SECOND LVDS Receiver Clock Signal(-) 10 OPC Enable ‘H’ = Enable , ‘L’ or NC = Disable 36 R2CLKP SECOND LVDS Receiver Clock Signal(+) 11 GND Ground 37 GND Ground 12 R1AN FIRST LVDS Receiver Signal (A-) 38 R2DN SECOND LVDS Receiver Signal (D-) 13 R1AP FIRST LVDS Receiver Signal (A+) 39 R2DP SECOND LVDS Receiver Signal (D+) 14 R1BN FIRST LVDS Receiver Signal (B-) 40 NC No connection 15 R1BP FIRST LVDS Receiver Signal (B+) 41 NC No connection 16 R1CN FIRST LVDS Receiver Signal (C-) 42 NC or GND No Connection or Ground 17 R1CP FIRST LVDS Receiver Signal (C+) 43 NC or GND No Connection or Ground 18 GND Ground 44 GND Ground (Note 6) 19 R1CLKN FIRST LVDS Receiver Clock Signal(-) 45 GND Ground 20 R1CLKP FIRST LVDS Receiver Clock Signal(+) 46 GND Ground 21 GND Ground 47 NC No connection 22 R1DN FIRST LVDS Receiver Signal (D-) 48 VLCD Power Supply +12.0V 23 R1DP FIRST LVDS Receiver Signal (D+) 49 VLCD Power Supply +12.0V 24 NC No connection 50 VLCD Power Supply +12.0V 25 NC No connection 51 VLCD Power Supply +12.0V 26 NC or GND No Connection or Ground - - - - LCD Connector(CN1): FI-RE51S-HF(manufactured by JAE) or GT05P-51S-H38(manufactured by LSM) or IS050-C51B-C39(manufactured by UJU) - Mating Connector : FI-R51HL(JAE) or compatible 1. All GND(ground) pins should be connected together to the LCD module’s metal frame. 2. All VLCD (power input) pins should be connected together. 3. All Input levels of LVDS signals are based on the EIA 644 Standard. 4. #1~#6 & #9 NC (No Connection): These pins are used only for LGD (Do not connect) 5. Specific pins(pin No. #10) are used for OPC function of the LCD module. If not used, these pins are no connection. (Please see the Appendix VI for more information.) 6. Specific pin No. #44 is used for “No signal detection” of system signal interface. It should be GND for NSB(No Signal Black) during the system interface signal is not. If this pin is “H”, LCD Module displays AGP(Auto Generation Pattern). Product Specification LC550EUN Ver. 0.1 8 /36 3-2-2. Backlight Module Table 5-1. LED DRIVER CONNECTOR PIN CONFIGURATION ◆ Rear view of LCM PCB … … 141 Master -LED Driver Connector : 20022WR - H14B2(Yeonho) or Compatible - Mating Connector : 20022HS - 14B2 (Yeonho) or Compatible 141 Pin No Symbol Description Note 1 VBL Power Supply +24.0V 2 VBL Power Supply +24.0V 3 VBL Power Supply +24.0V 4 VBL Power Supply +24.0V 5 VBL Power Supply +24.0V 6 GND Backlight Ground 1 7 GND Backlight Ground 8 GND Backlight Ground 9 GND Backlight Ground 10 GND Backlight Ground 11 Status Back Light Status 2 12 VON/OFF Backlight ON/OFF control 3 13 NC Don’t care 14 NC Don’t care Notes :1. GND should be connected to the LCD module’s metal frame. 2. Normal : Low (under 0.7V) / Abnormal : Open 3. Each impedance of pin #12 is over 50 [KΩ] . ◆ Status Product Specification LC550EUN Ver. 0.1 9 /36 3-3. Signal Timing Specifications Table 6 shows the signal timing required at the input of the LVDS transmitter. All of the interface signal timings should be satisfied with the following specification for normal operation. Table 6. TIMING TABLE (DE Only Mode) Note: 1. The input of HSYNC & VSYNC signal does not have an effect on normal operation (DE Only Mode). If you use spread spectrum of EMI, add some additional clock to minimum value for clock margin. 2. The performance of the electro-optical characteristics may be influenced by variance of the vertical refresh rate and the horizontal frequency 3. Spread Spectrum Rate (SSR) for 50KHz ~ 100kHz Modulation Frequency(FMOD) is calculated by (7 – 0.06*Fmod), where Modulation Frequency (FMOD) unit is KHz. LVDS Receiver Spread spectrum Clock is defined as below figure ※ Timing should be set based on clock frequency. ITEM Symbol Min Typ Max Unit Note Horizontal Display Period tHV 960 960 960 tCLK 1920 / 2 Blank tHB 100 140 240 tCLK 1 Total tHP 1060 1100 1200 tCLK Vertical Display Period tVV 1080 1080 1080 Lines Blank tVB 20 (228) 45 (270) 69 (300) Lines 1 Total tVP 1100 (1308) 1125 (1350) 1149 (1380) Lines ITEM Symbol Min Typ Max Unit Note Frequency DCLK fCLK 63.00 74.25 78.00 MHz Horizontal fH 57.3 67.5 70 KHz 2 Vertical fV 57 (47) 60 (50) 63 (53) Hz 2 NTSC (PAL) Product Specification LC550EUN Ver. 0.1 10 /36 ※ Please pay attention to the followings when you set Spread Spectrum Rate(SSR) and Modulation Frequency(FMOD) 1. Please set proper Spread Spectrum Rate(SSR) and Modulation Frequency (FMOD) of TV system LVDS output. 2. Please check FOS after you set Spread Spectrum Rate(SSR) and Modulation Frequency(FMOD) to avoid abnormal display. Especially, harmonic noise can appear when you use Spread Spectrum under FMOD 30 KHz. Product Specification LC550EUN Ver. 0.1 11 /36 3-4. LVDS Signal Specification 3-4-1. LVDS Input Signal Timing Diagram 0.7VDD 0.3VDD tCLK Invalid data Valid data Invalid data Invalid data Invalid data Pixel 0,0 Pixel 2,0 Pixel 1,0 Pixel 3,0 DE(Data Enable) Valid data 0.5 VDD tHP DE(Data Enable) DCLK First data Second data DE, Data tHV tVV tVP 1 1080 Product Specification LC550EUN Ver. 0.1 12 /36 1) DC Specification 2) AC Specification Description Symbol Min Max Unit Note LVDS Common mode Voltage VCM 1.0 1.5 V - LVDS Input Voltage Range VIN 0.7 1.8 V - Change in common mode Voltage ΔVCM - 250 mV - LVDS 1’st Clock Tclk LVDS 2nd / 3rd / 4th Clock tSKEW_min tSKEW_max 20% 80% A tRF LVDS Data tSKEW LVDS Clock Tclk (Fclk = 1/Tclk ) tSKEW A 1. All Input levels of LVDS signals are based on the EIA 644 Standard. 2. If tRF isn’t enough, teff should be meet the range. 3. LVDS Differential Voltage is defined within teff Description Symbol Min Max Unit Note LVDS Differential Voltage VTH 100 300 mV 3 VTL -300 -100 mV LVDS Clock to Data Skew tSKEW - |(0.2*Tclk)/7| ps - LVDS Clock/DATA Rising/Falling time tRF 260 |(0.3*Tclk)/7| ps 2 Effective time of LVDS teff |±360| - ps - LVDS Clock to Clock Skew (Even to Odd) tSKEW_EO - |1/7* Tclk| ps - LVDS + LVDS - 0V V CM # V CM = {( LVDS +) + ( LVDS - )} /2 V IN _MAX V IN _MIN High Threshold Low Threshold Note 3-4-2. LVDS Input Signal Characteristics Product Specification LC550EUN Ver. 0.1 13 /36 tui0.5tui 360ps 360ps tui : Unit Interval teff LVDS Data * This accumulated waveform is tested with differential probe LVDS CLK 0V (Differential) VTH VTL 0V (Differential) Product Specification LC550EUN Ver. 0.1 14 /36 3-5. Color Data Reference The brightness of each primary color(red,green,blue) is based on the 8bit gray scale data input for the color. The higher binary input, the brighter the color. Table 7 provides a reference for color versus data input. Table 7. COLOR DATA REFERENCE Color Input Color Data RED MSB LSB GREEN MSB LSB BLUE MSB LSB R7 R6 R5 R4 R3 R2 R1 R0 G7 G6 G5 G4 G3 G2 G1 G0 B7 B6 B5 B4 B3 B2 B1 B0 Basic Color Black 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Red (255) 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Green (255) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 Blue (255) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Cyan 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Magenta 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Yellow 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 White 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 RED RED (000) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RED (001) 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ... ... ... ... RED (254) 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RED (255) 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GREEN GREEN (000) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GREEN (001) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 ... ... ... ... GREEN (254) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 GREEN (255) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 BLUE BLUE (000) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BLUE (001) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ... ... ... ... BLUE (254) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0 BLUE (255) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Product Specification LC550EUN Ver. 0.1 15 /36 T7 3-6. Power Sequence 3-6-1. LCD Driving circuit Table 8. POWER SEQUENCE 10% 0V 90% 10% T1 T2 T5 LED ON T3 T4 T6 Interface Signal (Tx_clock) Power for LED Power Supply For LCD VLCD User Control Signal (LVDS_select, OPC Enable, ExtVBR-B) 0V Valid Data 100% Note : Vcm : LVDS Common mode Voltage 10% Parameter Value Unit Notes Min Typ Max T1 0.5 - 20 ms 1 T2 0 - - ms 2 T3 400 - - ms 3 T4 200 - - ms 3 T5 1.0 - - s 4 T6 0 - T2 ms 5 T7 0 - - ms 6 90% 1. Even though T1 is over the specified value, there is no problem if I2T spec of fuse is satisfied. 2. If T2 is satisfied with specification after removing LVDS Cable, there is no problem. 3. The T3 / T4 is recommended value, the case when failed to meet a minimum specification, abnormal display would be shown. There is no reliability problem. 4. T5 should be measured after the Module has been fully discharged between power off and on period. 5. If the on time of signals (Interface signal and user control signals) precedes the on time of Power (VLCD), it will be happened abnormal display. When T6 is NC status, T6 doesn’t need to be measured. 6. It is recommendation specification that T7 has to be 0ms as a minimum value. ※ Please avoid floating state of interface signal at invalid period. ※When the power supply for LCD (VLCD) is off, be sure to pull down the valid and invalid data to 0V. 30% Product Specification LC550EUN Ver. 0.1 16 /36 3-6-2. Sequence for LED Driver Power Supply For LED Driver VON/OFF VBL 10% 0V 90% T1 T2 24V (typ.) T3 LED ON Table 9. Power Sequence for LED Driver 90% ExtVBR-B 3-6-3. Dip condition for LED Driver VBL(Typ.) x 0.8 0 V VBL : 24V T5 Notes : 1. T1 describes rising