ic封装大全（IC package Daquan）

ic封装大全（IC package Daquan） ic封装大全(IC package Daquan) IC package Daquan Add time: 2009-1-4 3:48:25, hits: 335 Source: Electronic Engineer, post Author: unknown -------------------------------------------------------------------------------- 1, BGA (ball, grid, array) Ball contact display, one of surface mount packages. A spherical bump is formed on the back of the printed substrate Instead of pins, the LSI chip is mounted on the front of the printed substrate and sealed with a molding resin or potting method. Also called convex Point display carrier (PAC). The pin can be more than 200 and is a package used in multi pin LSI. The package body can also be smaller than the QFP (four side pin flat package). For example, the pin center is 360 pin from the 1.5mm BGA is only 31mm square; and the pin center is 0.5mm from the 304 pin QFP to 40mm square. And, BGA, No. Worry about the pin deformation problem like QFP. The package was developed by Motorola, Inc., which was first introduced in portable phones and other devices, and is available in the United States in the future Be popular on personal computers. Initially, the BGA pin (Bump) center distance is 1.5mm, and the pin number is 225. Now too Some LSI manufacturers are developing 500 pin BGA. The problem with BGA is the appearance check after reflow. It is not clear whether an effective visual inspection method is available. Some believe that.., Because the center distance of the weld is greater, the connection can be considered stable and can only be handled by functional inspection. Motorola Corporation in the United States called encapsulated OMPAC sealed with molded resin, and sealed encapsulation of potting methods known as GPAC (see OMPAC and GPAC). 2, BQFP (Quad, flat, package, with, bumper) Four side pin flat package with cushion. One of the QFP packages is provided with a protrusion (buffer pad) in the four corners of the package body Prevent the pins from bending and deforming during transit. American semiconductor manufacturers are mainly used in microprocessors and ASIC circuits This package. Pin center distance 0.635mm, pin number from 84 to 196 or so (see QFP). 3, touch welding PGA (butt joint pin grid array) Surface mount PGA another name (see surface mount PGA). 4, C (ceramic) A mark indicating a ceramic package. For example, CDIP stands for ceramic DIP. A mark that is often used in practice. 5, Cerdip Glass sealed dual in-line ceramic package for ECL, RAM, DSP (digital signal processor) and other circuits. Have The Cerdip of the glass window is used for ultraviolet erase type EPROM and microcomputer circuits with EPROM inside. Pin center Distance from 2.54mm, number of pins from 8 to 42. In Japan, this package is represented as "DIP G" (G means glass seal). 6, Cerquad One of the surface mount packages, that is, a hermetically sealed ceramic QFP used to encapsulate DSP and other logic LSI circuits. With window The Cerquad of the mouth is used to encapsulate the EPROM circuitry. The heat dissipation is better than the plastic QFP, and can be allowed to be 1.5 ~ under natural air cooling conditions 2W power. But the packaging cost is 3~5 times higher than that of plastic QFP. The center distance of pins is 1.27mm, 0.8mm, 0.65mm, 0.5mm, 0.4mm and many other specifications. Number of pins from 32 to 368. 7, CLCC (ceramic, leaded, chip, carrier) CLCC, one of surface mount package, pin out from four sides of a T-shaped package. With a window for packaging UV erase type EPROM, and EPROM microcomputer circuit. This package is also called QFJ, QFJ - G (see QFJ). 8, COB (chip, on, board) On board chip packaging is one of the bare chip mount technology. The semiconductor chip is attached to the printed circuit board, chip and base The electrical connection of the plate is achieved by a lead suture method, The electrical connection between the chip and the substrate is achieved by a lead suture method and is covered with resin Cover to ensure reliability. Although COB is the most simple bare chip mounting technology, but it is far better than the TAB package density and rewind Welding technology. 9, DFP (dual, flat, package) Double pin flat package. Is another name for SOP (see SOP). Formerly known as this law, it is now largely unnecessary. 10, DIC (dual, in-line, ceramic, package) Ceramic DIP (glass sealed) another name (see DIP) 11, DIL (dual, in-line) DIP's nickname (see DIP). European semiconductor manufacturers use this name more often. 12, DIP (dual, in-line, package) Dual in line package. One of the plug-in packages, the pins are drawn from both sides of the package, and the packages are made of two kinds of plastic and ceramic. DIP is the most popular plug-in package, which includes standard logic, IC, memory LSI, microcomputer circuit, etc.. Pin center distance 2.54mm, pin number from 6 to 64. The package width is usually 15.2mm. Yes, the width is 7.52mm 10.16mm packages are called skinny, DIP, and slim DIP (DIP). In most cases, however, there is no distinction, Simply referred to as DIP. In addition, ceramic DIP sealed with low melting point glass is also called cerdip (see cerdip). 13, DSO (dual, small, out-lint) Double pin small outline package. SOP's nickname (see SOP). Some semiconductor manufacturers use this name. 14, DICP (dual, tape, carrier, package) Double pin carrying package. One of TCP (on board packages). Pins are fabricated on the insulating tape and are drawn from both sides of the package. Because of profit The TAB (automatic carry on welding) technique is very thin in package shape. Commonly used in liquid crystal display driver LSI, but most of the products are fixed. In addition, the 0.5mm thick memory LSI book package is in the development phase. In Japan, according to EIAJ (Japanese Electronic Mechanic) (industry) the standard specifies that DICP is named DTP. 15, DIP (dual, tape, carrier, package) Ditto。 The Japan Electronic Machinery Industry Association named DTCP (see DTCP). 16, FP (flat, package) Flat package. One of surface mount packages. Another name for QFP or SOP (see QFP and SOP). Some semiconductor manufacturers Use this name. 17, flip-chip Backward welding chip. One of the bare chip packaging technologies is to create a metal bump in the electrode region of the LSI chip and then bump the metal A pressure welding connection is performed with the electrode region on the printed substrate. The footprint of the package is essentially the same as the chip size. Yes, all packaging technologies The smallest and thinnest in surgery. But if the thermal expansion coefficient of the substrate is different from that of the LSI chip, it will react at the joint, thus affecting the reliability of the connection Of. Therefore, it is necessary to reinforce the LSI chip with resin and use the substrate material with the same coefficient of thermal expansion. 18, FQFP (fine, pitch, Quad, flat, package) Small pin center distance QFP. Usually refers to the pin center distance of less than 0.65mm QFP (see QFP). Partial conductor manufacturers Use this name. 19, CPAC (globe, top, pad, array, carrier) American Motorola's nickname for BGA (see BGA). 20, CQFP (Quad, Fiat, package, with, guard, ring) Four side pin flat package with protection ring. Plastic one of the QFP pins is protected with resin guard rings to prevent bending distortion. Before assembling the LSI on the printed substrate, the pin is cut off from the protective ring and made into the wing of the gull (L shape). This package In the United States, Motorola has been mass produced. Pin center distance 0.5mm, pin number is about 208. 21, H- (with, heat, sink) A mark indicating a radiator. For example, the HSOP indicates the SOP with the radiator. 22、针栅阵列(表面贴装式) 表面贴装型PGA。通常PGA为插装型封装，引脚长约表面贴装型PGA在封装的3.4毫米。 底面有陈列状的引脚，其长度从1.5mm到2.0mm。贴装采用与印刷基板碰焊的方法，因而也称 为碰焊PGA。因为引脚中心距只有1.27mm，比插装型PGA小一半，所以封装本体可制作得不 怎么大，而引脚数比插装型多(250,528)，是大规模逻辑用的封装封装的基材有多层陶LSI。 瓷基板和玻璃环氧树脂印刷基数。以多层陶瓷基材制作封装已经实用化。 23、J形引线陶瓷芯片载体(J字型引脚芯片载体) J形引脚芯片载体。指带窗口CLCC和带窗口的陶瓷千复吉的别称(见CLCC和千复吉部分半)。 导体厂家采用的名称。 24、LCC(无引线芯片载体) 无引脚芯片载体。指陶瓷基板的四个侧面只有电极接触而无引脚的表面贴装型封装。是高 速和高频IC用封装，也称为陶瓷QFN或QFN,C(见QFN)。 25、LGA(栅格阵列) 触点陈列封装。即在底面制作有阵列状态坦电极触点的封装。装配时插入插座即可。现已 实用的有227触点(1.27中心距)和447触点(2.54mm中心距)的陶瓷LGA，应用于高速逻辑 LSI电路。 LGA与QFP相比，能够以比较小的封装容纳更多的输入输出引脚另外，由于引线的阻抗。 小，对于高速LSI是很适用的。但由于插座制作复杂，成本高，现在基本上不怎么使用。预计 今后对其需求会有所增加。 26、LOC(引线芯片) 芯片上引线封装。LSI封装技术之一，引线框架的前端处于芯片上方的一种结构，芯片的 中心附近制作有凸焊点，用引线缝合进行电气连接。与原来把引线框架布置在芯片侧面附近的 结构相比，在相同大小的封装中容纳的芯片达1mm左右宽度。 27、LQFP(薄型四方扁平封装) 薄型QFP。指封装本体厚度为1.4mm的QFP，是日本电子机械工业会根据制定的新QFP 外形规格所用的名称。 28、L,四 陶瓷QFP之一。封装基板用氮化铝，基导热率比氧化铝高7,8倍，具有较好的散热性。 封装的框架用氧化铝，芯片用灌封法密封，从而抑制了成本开发的一种封装是为逻辑LSI， 在自然空冷条件下可容许W3的功率。现已开发出了208引脚(0.5mm中心距)和160引脚(0.65 中心距)的LSI逻辑用封装，并于1993年10月开始投入批量生产。 29、MCM(多芯片模块) 多芯片组件。将多块半导体裸芯片组装在一块布线基板上的一种封装。根据基板材料可分 为MCM MCM,,L，C和MCM,D三大类。 MCM,L是使用通常的玻璃环氧树脂多层印刷基板的组件布线密度不怎么高，成本较低。 MCM,C是用厚膜技术形成多层布线，以陶瓷(氧化铝或玻璃陶瓷)作为基板的组件，与使 用多层陶瓷基板的厚膜混合IC类似。两者无明显差别。布线密度高于MCM,L. MCM,D是用薄膜技术形成多层布线，以陶瓷(氧化铝或氮化铝)或硅铝作为基板的组件、。 布线密谋在三种组件中是最高的，但成本也高。 30、MFP(微型扁平封装) 小形扁平封装。塑料SOP或SSOP的别称(见SOP和SSOP)。部分半导体厂家采用的名称。 31、MQFP(公制四方扁平封装) 按照JEDEC(美国联合电子设备委员会)标准对QFP进行的一种分类。指引脚中心距为 0.65mm、本体厚度为3.8mm,2.0mm的标准QFP(见QFP)。 32、MQUAD(左四) 美国奥林公司开发的一种QFP封装。基板与封盖均采用铝材，用粘合剂密封。在自然空冷 条件下可容许2.5w,2.8w的功率日本新光电气工业公司于1993年获得特许开始生产。 33、MSP(迷你方包) 合格境外机构投资者的别称(见QFI)，在开发初期多称为msp.qfi是日本电子机械工业会 规定 关于下班后关闭电源的规定党章中关于入党时间的规定公务员考核规定下载规定办法文件下载宁波关于闷顶的规定 的名称。 34、社区军事行动辅助(超模压垫阵列载体) 模压树脂密封凸点陈列载体。美国摩托罗拉公司对模压树脂密封BGA采用的名称(见 BGA)。 35、P,(塑料) 表示塑料封装的记号如PDIP表示塑料倾角。 36、PAC(PAD阵列载波) 凸点陈列载体，BGA的别称(见BGA)。 37、PCLP(印刷电路板无铅封装) 印刷电路板无引线封装。日本富士通公司对塑料QFN(塑料LCC)采用的名称(见引QFN)。 脚中心距有0.55mm和0.4mm两种规格。目前正处于开发阶段。 38、PFPF(塑料扁平封装) 塑料扁平封装。塑料QFP的别称(见QFP)。部分LSI厂家采用的名称。 39、PGA(针栅阵列) 陈列引脚封装。插装型封装之一，其底面的垂直引脚呈陈列状排列。封装基材基本上都采 用多层陶瓷基板。在未专门表示出材料名称的情况下，多数为陶瓷PGA，用于高速大规模逻辑 LSI电路。成本较高。引脚中心距通常为2.54mm，引脚数从64到447左右。 了为降低成本，封装基材可用玻璃环氧树脂印刷基板代替。也有64,256引脚的塑料PGA。 另外，还有一种引脚中心距为1.27mm的短引脚表面贴装型PGA(碰焊PGA)。(见表面贴装 型PGA)。 40、小猪背 驮载封装。指配有插座的陶瓷封装，形关与浸、QFP、相似在开发带有微机的设QFN封装。 备时用于 评价 LEC评价法下载LEC评价法下载评价量规免费下载学院评价表文档下载学院评价表文档下载 程序确认操作。例如，将插入插座进行调试这种封装基本上都是定制EPROM。 品，市场上不怎么流通。 41、PLCC(塑料有引线芯片载体) 带引线的塑料芯片载体。表面贴装型封装之一引脚从封装的四个侧面 引出，呈丁字形， 是塑料制品。美国德克萨斯仪器公司首先在64k位DRAM和256kdram中采用，现在已经普 及用于逻辑LSI、DLD(或程逻辑器件)等电路。引脚中心距1.27mm，引脚数从18到84。 J形引脚不易变形，比QFP容易操作，但焊接后的外观检查较为困难。 PLCC与LCC(也称QFN)相似。以前，两者的区别仅在于前者用塑料，后者用陶瓷。但现 在已经出现用陶瓷制作的J形引脚封装和用塑料制作的无引脚封装(标记为塑料LCC、PCLP、P ,LCC等)，已经无法分辨。为此，日本电子机械工业会于1988年决定，把从四侧引出J形引 脚的封装称为千复吉，把在四侧带有电极凸点的封装称为QFN(见千复吉和QFN)。 42、P,LCC(塑料无引线芯片载体)(塑料有引线芯片载体) 有时候是塑料千复吉的别称，有时候是QFN(塑料LCC)的别称(见千复吉和部分QFN)。 LSI PLCC says the lead package manufacturers, with PLCC said leadless package, to show the difference. 43, QFH (Quad, flat, high, package) Four side pin thick body flat package. One of the plastic QFP, in order to prevent the package body from breaking, the QFP body is fabricated Thicker (see QFP). The name used by some semiconductor manufacturers. 44, QFI (Quad, flat, I-leaded, packgac) Four side I pin flat package. One of surface mount packages. The pins are drawn from the four sides of the package, down to I. Also called MSP (see MSP). Bonding and printing substrates for bump welding. Because the pin has no protruding parts, the mounting area is small At QFP. Hitachi made for video IC simulation and the use of this package. In addition, Japan's Motorola PLL IC This package is also used. Pin center distance 1.27mm, pin number from 18 to 68. 45, QFJ (Quad, flat, J-leaded, package) Four side J pin flat package. One of the surface mount packages. The pins are drawn from the four sides of the package and downward to J. It is the name of the Japan electronic machinery industry association. Pin center distance 1.27mm. There are two kinds of materials: plastic and ceramic. Most of the plastic QFJ is called PLCC (see PLCC). It is used for microcomputers and door displays, DRAM, ASSP, OTP and other circuits. Number of pins from 18 to 84. Ceramic QFJ is also called CLCC and JLCC (see CLCC). A windowed package for UV erase type EPROM, as well as Microcomputer chip circuit with EPROM. Number of pins from 32 to 84. 46, QFN (Quad, flat, non-leaded, package) Four side flat package without pin. One of surface mount packages. Now it's called LCC. QFN is Japan's electronic machinery industry Name specified. An electrode contact is arranged on the four sides of the package, and the occupied area is smaller than the QFP because of the non pin, and the height is higher than that of QFP Low. However, when the stress is generated between the printed substrate and the package, it cannot be relieved at the electrode contact. Electrode contacts It is difficult to do as many pins as QFP, usually from 14 to 100. There are two kinds of materials: ceramics and plastics. When there are LCC marks, they are basically ceramic QFN. Electrode contact center distance 1.27mm. Plastic QFN is a low cost package made from glass epoxy printed substrates. The center distance of electrode contacts is outside 1.27mm, There are two kinds of 0.65mm and 0.5mm. This package is also known as LCC, PCLC, PLCC plastic etc.. 47, QFP (Quad, flat, package) Four side pin flat package. One of the surface mount packages, which come out of four sides to form the gull wing (L). The base material is earthenware There are three kinds of porcelain, metal and plastic. In quantity, plastic packaging accounts for most of it. When there is no particular indication of the material, the majority Plastic QFP. Plastic QFP is the most popular multi pin LSI package. Not only for microprocessor, door display and other digital logic LSI circuits, but also for VTR signal processing, audio signal processing and other analog LSI circuits. The center distance between pins is 1.0mm and 0.8mm, 0.65mm, 0.5mm, 0.4mm, 0.3mm and many other specifications. 0.65mm center distance specification, the maximum number of pins is 304. Japan will pin the center of the distance of less than 0.65mm QFP called QFP (FP). But now the Japanese electronic machinery industry will be QFP The profile specifications were re evaluated. There is no difference in pin center distance, but is divided into thickness according to the thickness of package body QFP (2.0mm ~ 3.6mm thick), LQFP (1.4mm thick) and TQFP (1.0mm thick) three kinds. In addition, some LSI manufacturers take the pin center from 0.5mm to QFP, which is called contraction type QFP or SQFP, VQFP. But some manufacturers pin the center from 0.65mm and 0.4mm QFP, also known as SQFP, to make the name a little bit confusing. The disadvantage of QFP is that the pin is easy to bend when the pin center distance is less than 0.65mm. To prevent pin deformation, it is now available Several improved QFP varieties have emerged. For example, the four corners of the package are BQFP with a cushion of trees (see BQFP); with resin protection The ring covers the GQFP at the front end of the pin (see GQFP); a test convex point is provided in the package body and a dedicated clamp for preventing pin deformation TPQFP with built-in test (see TPQFP). In logic LSI, many products and high reliability products are encapsulated in multilayer ceramic QFP. Pin center distance is minimum 0.4mm, pin number of up to 348 products have also been published. Also useful are glass sealed ceramic QFP (see Gerqad). 48, QFP (FP) (QFP, fine, pitch) Small center distance QFP. The name stipulated by the Japan electronic machinery industry standard. The center distance between pins is 0.55mm, 0.4mm, 0.3mm, etc. 0.65mm less than QFP (see QFP). 49, QIC (Quad, in-line, ceramic, package) Another name for ceramic QFP. The names adopted by some semiconductor manufacturers (see QFP, Cerquad). 50, QIP (Quad, in-line, plastic, package) Another name for plastic QFP. The name adopted by some semiconductor manufacturers (see QFP). 51, QTCP (Quad, tape, carrier, package) Four side pin carrying package. One of the TCP packages forms pins on the insulating tape and is drawn from the four sides of the package. Use TAB technology's thin package (see TAB, TCP). 52, QTP (Quad, tape, carrier, package) Four side pin carrying package. The Japanese electronic machinery industry was used in April 1993 for the outline specifications developed by the QTCP Name (see TCP). 53, QUIL (Quad, in-line) QUIP's nickname (see QUIP). 54, QUIP (Quad, in-line, package) Four column in line package. The pins are drawn from the two sides of the package and are bent out of each other into four columns. In pin The center distance is 1.27mm, and when inserted into the printed substrate, the center distance becomes 2.5mm. Therefore, it can be used for standard printed circuit boards. yes A package smaller than standard DIP. The Nec Corp uses some of the microprocessor chips for desktop and home appliance products Seed encapsulation. There are two kinds of materials: ceramics and plastics. Pin number 64. 55, SDIP (shrink, dual, in-line, package) Contractile DIP. One of the plug-in packages with the same shape as the DIP, but the pin center distance (1.778mm) is less than DIP (2.54mm), Hence the appellation. Number of pins from 14 to 90. Also known as the SHDIP. There are two kinds of materials: ceramics and plastics. 56, SHDIP (shrink dual in-line package) Same SDIP. The name used by some semiconductor manufacturers. 57, SIL (single, in-line) SIP's nickname (see SIP). European semiconductor manufacturers adopt the name "SIL". 58, SIMM (single, in-line, memory, module) Single row memory module. A memory assembly provided with electrodes only near one side of a printed substrate. Usually plug into a socket Components. The standard SIMM consists of two electrodes with a center distance of 2.54mm and 72 electrodes with a center distance of 30 1.27mm. Single sided or double sided printed SIMM boards with 1 Mbit and 4 Mbit of DRAM in SOJ packages are already available in the individual Computers, workstations and other equipment have been widely used. At least 30 to 40% of the DRAM is assembled in the SIMM. 59, SIP (single, in-line, package) Single in-line package. The pins are drawn from one side of the package and arranged in a straight line. Seal when assembled onto a printed substrate Assume a vertical position. Pin center distance is usually 2.54mm, the number of pins from 2 to 23, mostly custom products. The shapes of packages are different Iso. Others have the same shape as the ZIP package called SIP. 60, SKDIP (skinny dual in-line package) A kind of DIP. A narrow body DIP with a width of 7.62mm and a pin center of 2.54mm. 通常统称为DIP(见 DIP)。 61、SL,DIP(苗条的双列直插式封装) 浸的一种。指宽度为10.16mm，引脚中心距为2.54mm的窄体通常统称为浸浸。 62，SMD(表面贴装器件) 表面贴装器件。偶而，有的半导体厂家把SOP归为SMD(见SOP)。 63，所以(小外线) SOP的别称。世界上很多半导体厂家都采用此别称(见SOP)。 64、SOI(小线I字型引脚封装) 我形引脚小外型封装。表面贴装型封装之一。引脚从封装双侧引出向下呈我字形，中心距 1.27mm。贴装占有面积小于SOP。日立公司在模拟IC(集成电路中采用了此封装引脚数电机驱动用)。 26。 65、SOIC(小线集成电路) SOP的别称(见SOP)。国外有许多半导体厂家采用此名称。 66、SOJ(小线J字型引脚封装) J形引脚小外型封装。表面贴装型封装之一。引脚从封装两侧引出向 下呈J字形，故此得名。 通常为塑料制品，多数用于DRAM和等存储器LSI电路但绝大部分是SRAM，DRAM。用SOJ 封装的DRAM SIMM上器件很多都装配在。引脚中心距1.27mm，引脚数从20至40(见SIMM)。 67、SQL(小线l-leaded包) 按照JEDEC(美国联合电子设备工程委员会)标准对SOP所采用的名称(见SOP)。 68、SONF(小线无翅) 无散热片的SOP。与通常的SOP相同。为了在功率IC封装中表示无散热片的区别，有意 增添了NF(无翅)标记部分半导体厂家采用的名称(见SOP)。 69、SOF(小线包) 小外形封装。表面贴装型封装之一，引脚从封装两侧引出呈海鸥翼状(L字形材料有塑料)。 和陶瓷两种另外也叫溶胶和DFP。 SOP除了用于存储器LSI外，也广泛用于规模不太大的等电路在输入输出端子不ASSP。 超过10,40的领域，SOP是普及最广的表面贴装封装。引脚中心距 1.27mm，引脚数从8,44。 另外，引脚中心距小于1.27mm的SOP也称为SSOP;装配高度不到1.27mm的SOP也称为 TSOP(见SSOP、TSOP)还有一种带有散热片的SOP。 70、母猪(小外形封装(宽JYPE)) 宽体部分半导体厂家采用的名称SOP。