IPC-J-STD-003

JOINT INDUSTRY STANDARD Solderability Tests for Printed Boards 1st WORKING DRAFT ANSI/J–STD-003 APRIL 1992 I N DUSTR ES EST. 1924 CINORTCEL I E A A S S O C I T I O N AMERICAN NATIONAL STANDARD Notice EIA and IPC Standards and Publications are designed to serve the public interest through eliminating misunderstandings between manufacturers and purchasers, facilitating interchangeability and improvement of products, and assisting the pur- chaser in selecting and obtaining with minimum delay the proper product for his particular need. Existence of such Standards and Publications shall not in any respect preclude any member or nonmember of EIA or IPC from manufacturing or selling products not conforming to such Standards and Publications, nor shall the existence of such Standards and Publications preclude their voluntary use by those other than EIA or IPC members, whether the standard is to be used either domesti- cally or internationally. Recommended Standards and Publications are adopted by EIA and IPC without regard to whether their adoption may involve patents on articles, materials, or pro- cesses. By such action, EIA and IPC do not assume any liability to any patent owner, nor do they assume any obligation whatever to parties adopting the Recom- mended Standard or Publication. Users are also wholly responsible for protecting themselves against all claims of liabilities for patent infringement. The material in this joint standard was developed by the EIA Soldering Technology Committee (STC) and the IPC Soldering/Solderability Specifications Task Group (5-23a). For Technical Information Contact: Electronic Industries Association Engineering Department 2500 Wilson Boulevard Arlington, VA 22201 Phone (703) 907-7500 Fax (703) 907-7501 The Institute for Interconnecting and Packaging Electronic Circuits 2215 Sanders Road Northbrook, IL 60646 Phone (847) 509-9700 Fax (847) 509-9798 Please use the Standard Improvement Form shown at the end of this document. Copyright © 1996 by the Electronics Industries Association and the Institute for Interconnecting and Packaging Electronic Circuits. All rights reserved. Published 1996. Printed in the United States of America. No part of this publication may be reproduced in any form, in an electronic retrieval system or otherwise, without the prior written permission of the publisher. AMERICAN NATIONAL STANDARD AMERICAN NATIONAL STANDARDS INSTITUTE APPROVED JUNE 2, 1992 AS AN J-STD-003 Solderability Tests for Printed Boards A joint standard developed by the Joint Soldering/Solderability Specifications Task Group Users of this standard are encouraged to participate in the development of future revisions. Contact: EIA Engineering Department 2500 Wilson Boulevard Arlington, VA 22201 Phone (703) 907-7500 Fax (703) 907-7501 IPC 2215 Sanders Road Northbrook, IL 60062-6135 Phone (847) 509-9700 Fax (847) 509-9798 JOINT INDUSTRY STANDARD Acknowledgment Any Standard involving a complex technology draws material from a vast number of sources. While the principle members of the Soldering/ Solerability Specifications Task Group of the IPC Joining Processes Committee are shown below, it is not possible to include all of those who assisted in the evolution of this Standard. To each of them, the members of the IPC extend their gratitude. Joining Processes Committee Soldering/Solderability Specifications Task Group Technical Liaison of the IPC Board of Directors Chairman David Schoenthaler AT&T Chairman John DeVore G.E. Bonnie Fena Hibbing Printed Circuits Joint Soldering/Solderability Specifications Task Group L. Abbagnaro, Pace Inc. F.C. Albers, Unisys Corp. P.J. Amick, Mc Donnell Douglas Elec. Sys Co. J.E. Andrews, Hadco Corp. F. Anglade, Metronelec H.R. Armfield, Litton Data Systems J. Baker, Repco Inc. G. Bates, Sherwood Medical A. Beikmohamadi, E I DuPont De Nemours & Co. J.G. Bernauer, Unisys Corp. D.F. Bernier, Kester Solder Division S.T. Bora, Smiths Industries C. Bradshaw, Memorex Telex Corp. C. Brill, AMP Inc. Dr. J. Brous, Alpha Metals Inc. S.F. Caci, Raytheon Co. L.W. Canarr, Rockwell International T.A. Carroll, Hughes Aircraft Co. A. Cash, Northrop Corp. K.C. Chao, Lockheed Missiles & Space Co. W.A. Clark, AT&T Bell Laboratories D. Cotosky, Kester Solder Division L.A. Crouch, D. Currie, Teledyne Systems Co. G. Cushman, Eptac Corporation G.J. Davy, Westinghouse Electric Corp. J.A. DeVore, General Electric Co. M.D. Dillie, Magnavox R.J. Edgington, National Standard Co. D.A. Elliott, Electrovert Ltd. G.P. Evans, Indium Corp. of America J.W. Evans, NASA HQ H.S. Feldmesser, Johns Hopkins University J.R. Felty, Texas Instruments Inc. R. Fields, E I DuPont De Nemours & Co. A.D. Flaten, AT&T Information Systems J. Gamalski, Siemens AG J. Gechter, Delco Systems Operations P. Gildehaus, Allied Signal Aerospace C. Gonzalez, SCI Manufacturing Inc. B. Gulati, Parker/Gull Electronic Sys Div V. Gundotra, Motorola Inc. W.B. Hampshire, Tin Information Ctr of N Amer S. Herrberg, Magnavox Electronic Systems Co. D.D. Hillman, Rockwell International P.E. Hinton, Hinton ‘‘PWB’’ Engineering R.R. Holmes, AT&T Microelectronics J.B. Hoppke, Alliant Techsystems Inc. L. Hymes, Plexus Corp. R.C. Ihling, Lockheed Missiles & Space Co. B. Inpyn, Pitney Bowes Inc. M.W. Jawitz, Litton Guidance & Control Sys. L.G. Johnson, General Electric Co. S.A. Jones, Wilcox Electric Inc. M. Kasilag, Aerojet Electrosystems Co. C. Kemp, General Electric Co. G.W. Kenealey, Control Data Corp. W.G. Kenyon, E I DuPont De Nemours & Co. K.Kirby, CAE-Link Corp. L.P. Knowles, Librascope Corp. T. Kokocinski, Northrop Corp. R. Kraszewski, Kester Solder Division V. Kumar, Martin-Marietta Electronics E.J. Kuntz, Alcatel Network Systems Inc. V. Kuo, EMPF M.A. Kwoka, Harris Corp. L.P. Lambert, Digital Equipment Corp. J. P. Langan, Enthone-Omi Inc. R.B. Lomerson, General Dynamics L. Lynch, AT&T Microelectronics S.C. Mackzum, Ericsson GE J.E. Madison, CTS Corp. J.F. Maguire, Boeing Aerospace & Electronics J.R. Maki, Harris Corp. S. Mansilla, Robisan Laboratory Inc. R. Martinez, Magnavox West Coast Operations R.E. Mc Lean, Storage Technology Corp. S. Meeks Jr., Lexmark International/ IBM Corp. J.H. Moffitt, U.S. Navy G.C. Munie, AT&T Bell Laboratories R.D. Nicholas, London Chemical Co Inc. R.L. Nielsen, Fastman Kodak Co Kad R.B. Officer, Lockheed Sanders Inc. R. Parker, Hewlett Packard Laboratories H.E. Parkinson, Digital Equipment Corp. R. Payne, Sundstrand Data Control Inc. R.J. Phillips, Lorain Products P.J. Plonski, Photocircuits Corp. R. Pond, Texas Instruments Inc. J-STD-003 April 1992 ii P.J. Quinn, General Electric Co. M. Qurashi, U.S. Navy R. Ramos, Trace Laboratories—East J.R. Reed, Texas Instruments Inc. P.M. Rehm, Intel Corp. M. Reithinger, Siemens AG D.E. Robertson, Pace Inc. J.G. Rosser, Hughes Aircraft Co. A.B. Rotman, DCMR Boston (Dept of Defense) Dr. W. Rubin, Multicore Solders D. Rudy, AT&T Bell Laboratories D.W. Rumps, AT&T Technology Systems N. Rusignuolo, Hexacon Electric Co. H.J. Russell, Defense General Supply Center W.R. Russell, Texas Instruments Inc. D. Scheiner, Kester Solder Division A. Schneider, Alpha Metals Inc. D. Schoenthaler, AT&T Bell Laboratories J.T. Slanina, Allied Signal Aerospace E. Small, Multicore Solders W.A. Smith, General Dynamics N. Socolowski, Alpha Metals Inc. J.R. Sovinsky, Indium Corp. of America A. Starosta, Eldec Corp. C.J. Sworin, Kester Solder Division G. Theroux, Honeywell Inc. P.A. Thibodeau, Digital Equipment Dr. L.J. Turbini, Georgia Institute/ Technology H. Underwood, U.S. Air Force D. Varnell, Hercules Inc. D.A. Vaughan, E I DuPont De Nemours & Co. E. Vollmar, Methode Electronics Inc. B. Waller, Texas Instruments Inc. C.E.T. White, Indium Corp. of America R.N. Wild, IBM Corp. D. Wolf, Hadco Corp. M. Wolverton, Texas Instruments Inc. Dr. T. S. Won, Allied Signal Aerospace R. Woodgate, Woodcorp Inc. J.R. Wooldridge, Rockwell International R.O. Young, Rockwell International W. Younger, PC World—Orange County April 1992 J-STD-003 iii Table of Contents 1.0 SCOPE...................................................................... 1 1.1 Scope ...................................................................... 1 1.2 Purpose ................................................................... 1 1.3 Objective................................................................. 1 1.4 Performance Classes .............................................. 1 1.5 Method Classification............................................. 1 1.5.1 Tests with Established Accept/Reject Criterion.................................................................. 1 1.5.2 Test(s) without Established Accept/ Reject Criterion ...................................................... 1 1.6 Test Method Selection............................................ 1 1.7 Test Specimen Requirements ................................. 2 1.8 Coating Durability.................................................. 2 1.9 Limitation ............................................................... 2 2.0 APPLICABLE DOCUMENTS .................................. 2 2.1 Industry................................................................... 3 2.1.1 IPC.......................................................................... 3 2.2 Government ............................................................ 3 2.2.1 Federal .................................................................... 3 3.0 REQUIREMENTS ..................................................... 3 3.1 Terms and Definitions ............................................ 3 3.2 Materials ................................................................. 3 3.2.1 Solder...................................................................... 3 3.2.2 Flux......................................................................... 3 3.2.3 Flux Removal Material .......................................... 3 3.3 Equipment............................................................... 3 3.3.1 Steam Aging Apparatus.......................................... 3 3.3.2 Solder Pot/Bath ...................................................... 4 3.3.3 Optical Inspection Equipment................................ 4 3.3.4 Dipping Equipment ................................................ 4 3.3.5 Timing Equipment.................................................. 4 3.4 Preparation for Testing........................................... 4 3.4.1 Specimen Preparation and Conditioning For Test................................................................... 4 3.4.2 Steam Aging ........................................................... 4 3.4.3 Baking..................................................................... 4 3.5 Solder Bath Requirements ..................................... 4 3.5.1 Solder Temperatures............................................... 4 3.5.2 Solder Contamination Control ............................... 4 4.0 TEST PROCEDURES .............................................. 4 4.1 Test Procedure Limitations .................................... 4 4.1.1 Application of Flux ................................................ 5 4.2 Tests with Established Accept/Reject Criterion .... 5 4.2.1 Test A—Edge Dip Test .......................................... 5 4.2.2 Test B—Rotary Dip Test ....................................... 5 4.2.3 Test C—Solder Float Test...................................... 8 4.2.4 Test D—Wave Solder Test................................... 10 4.3 Test(s) without Established Accept/ Reject Criterion .................................................... 11 4.3.1 Test E—Wetting Balance Test ............................. 11 5.0 EVALUATION AIDS .............................................. 12 5.1 Evaluation Aids—Surface .................................... 12 5.2 Evaluation Aids—For Class 3 Plated Through-holes....................................................... 12 6.0 NOTES .................................................................... 12 6.1 Test Equipment Sources....................................... 14 6.1.1 Edge Dip Solderability Test Apparatus ............... 14 6.1.2 Rotary Dip Test Apparatus................................... 14 6.1.3 Wetting Balance Test Apparatus .......................... 14 6.1.4 Steam Aging Equipment ...................................... 14 6.2 Wetting Times ...................................................... 15 6.3 Correction for Buoyancy...................................... 15 6.4 Preheat .................................................................. 15 6.5 Baking/Testing Time Delay ................................. 15 6.6 Prebaking .............................................................. 15 6.7 Safety Note........................................................... 16 6.8 Use of Non-Activated Flux.................................. 16 6.9 Other Fluxes ......................................................... 16 6.10 Solder Contact ...................................................... 16 6.11 Steam Aging ......................................................... 16 Figures Figure 1 Contact angle ....................................................... 3 Figure 2 Edge dip solderability test .................................... 6 Figure 3a Suggested test specimen—for plated through-holes........................................................ 7 Figure 3b Suggested test specimen—for surface mount features................................................................. 8 Figure 4 Rotary dip test ...................................................... 8 Figure 5 Effectiveness of solder wetting of plated- through holes–Class 3 ......................................... 9 Figure 6 Wetting balance apparatus ................................ 12 Figure 7a Wetting time acceptance criteria........................ 13 Figure 7b Wetting force acceptance criteria....................... 13 Figure 8 Wetting balance curve........................................ 14 Figure 9 Aid to evaluation................................................. 15 Tables Table 1 Test Method Selection.......................................... 2 Table 2 Accelerated Aging and Test Requirements.......... 2 Table 3 Maximum Limits of Solder Bath Contaminant ..... 3 Table 4 Steam Temperature Requirements ...................... 4 April 1992 IPC-STD-003 iv f C I u April 1992 J-STD-003 lass 3 High Reliability Electronic Products ncludes the equipment for commercial and military prod- cts where continued performance or performance on Northbrook, IL 60062-6135 1.6 Test Method Selection For appropriate test selection refer to paragraph 1.5 and Tables 1 & 2. The test selection Solderability Tests 1.0 SCOPE 1.1 Scope This standard prescribes the recommended test methods, defect definitions and illustrations for assess- ing the solderability of printed board surface conductors, attachment lands, and plated through-holes. This standard is intended for use by both vendor and user. 1.2 Purpose The solderability determination is made to verify that the printed board fabrication processes and sub- sequent storage have had no adverse effect on the solder- ability of those portions of the printed wiring board intended to be soldered. This is determined by evaluation of the solderability specimen portion of a board or repre- sentative coupon which has been processed as part of the panel of boards and subsequently removed for testing per the method selected. 1.3 Objective The objective of the solderability test methods described in this standard is to determine the abil- ity of printed board surface conductors, attachment lands, and plated through-holes to wet easily with solder and to withstand the rigors of the printed board assembly pro- cesses. 1.4 Performance Classes Three general classes have been established to reflect progressive increases in sophis- tication, functional performance requirements and testing/ inspection frequency. It should be recognized that there may be an overlap of equipment categories in different classes. The user has the responsibility to specify in the contract or purchase order the performance class required for each product and shall indicate any exceptions to spe- cific parameters, where appropriate. Class 1 General Electronic Products Includes consumer products, some computer and computer peripherals, as well as general military hardware suitable for applications where cosmetic imperfections are not important and the major requirement is function of the completed printed board. Class 2 Dedicated Service Electronic Products Includes communications equipment, sophisticated busi- ness machines, instruments and military equipment where high performance and extended life is required and for which uninterrupted service is desired but not critical. Cer- tain cosmetic imperfections are allowed. or Printed Boards demand is critical. Equipment downtime cannot be toler- ated and must function when required such as in life sup- port items or missile systems. Printed boards in this class are suitable for applications where high levels of assurance are required and service is essential. 1.5 Method Classification This standard describes test methods by which both the surface conductors (and attach- ment lands) and plated through-holes may be evaluated for solderability. Provisions are made for this determination to be performed at the time of manufacture, at the receipt of the boards by the user, or just prior to assembly and soldering. User and vendor shall agree to the appropriate method to be used and their correlation. Standard dwell times are defined in some of the methods called out in this standard. Variations in board heat capac- ity may necessitate the use of longer solder dwell times (see paragraph 6.2). Any change in solder dwell shall be agreed upon by user and vendor. 1.5.1 Tests with Established Accept/Reject Criterion Test A— Edge Dip Test (For surface conductors and attachment lands only) Test B— Rotary Dip Test (For plated through-holes, sur- face conductors and attachment lands, solder source side) Test C— Solder Float Test (For plated through-holes, sur- face conductors and attachment lands, solder source side) Test D—Wave Solder Test (For plated through-holes, sur- face conductors and attachment lands, solder source side) 1.5.2 Test(s) without Established Accept/Reject Criterion Test E—Wetting Balance Test (For surface conductors and attachment lands only) Please forward all test data generated using this test method, including type of board tested (such as Type 2 or 12 layer, Type 3), dimensions of coupon tested, and any pretreatment, to: IPC Wetting Balance Task Group (PWB) 2215 Sanders Road 1 n e e rf X r r r X J-STD-003 April 1992 should consider the final soldering process so that the results of the test will best represent that process. 1.7 Test Specimen Requirements The test specimen shall be a representative coupon, a portion of the printed wiring board being tested, or a whole board if within size limits, such that an immersion depth defined in the indi- vidual method is possible. The test specimen shall be rep- resentative of the lot being tested. When this test specimen is to be used as a criterion for material acceptance, the number of test specimens shall be defined by agreement between the user and vendor. Test coupons that may be used for rigid board surface solderability and plated through-hole solderability are detailed in the paragraph sec- tions under the individual test methods. Similar coupons may be used provided they reflect the board circuitry, hole, and construction, and have been processed in conjunction with the printed board being evaluated. Unless otherwise specified, the land associated with a plated through-hole shall be considered part of the plated through-hole if it is used for through-hole atta