180纳米逻辑芯片制造流程PPT

018LGProcessIntroduction(1P6M)LogicCircuit:能够展现精确的模拟特性，SOC与IC组成的系统相比，由于SOC能够综合并全盘考虑整个系统的各种情况，可以在同样的工艺技术条件下实现更高性能的系统指标若采用IS方法和0.35m工艺设计系统芯片，在相同的系统复杂度和处理速率下，能够相当于采用0.25~0.18m工艺制作的IC所实现的同样系统的性能与采用常规IC方法设计的芯片相比，采用SOC完成同样功能所需要的晶体管数目可以有数量级的降低ASIC:为了满足消费者特定需求而专门设计的半导体电路VDDINOUTCMOS反相器VDDYA1A2与非门：Y=A1A2基本电路结构：MOS器件结构基本电路结构：CMOS18LGadopt27Photomask,ifincludeESDlayerAA/Poly/CT/M1~M5/V1~V5useDUVscanner(13layer)“DARC”CaponCriticallayerandTopM6Poly&M1~M5adoptOPC(opticalproximitycorrection)forline-endshorting&islandmissingCompositeSpacer(ONO)PSMmethodapplyonCTlayerCobaltsalicideprocessLowKIMDlayer(FSG)0.18umProcessFeaturesOutline1.STI/TrenchIsolation2.WellDefinition/VtAdjust3.GateFormation4.N/PMOSFormation5.SalicideFormation6.ILDLayer/ContactCT(FEOL:device)7.Metal/VIA8.TopMetalVia9.Passivation(BEOL:interconnect)WAFERSTART&RSCHECKPtype8~12ohm-cm,non-EPIwaferStartOX100Adry1.PRisolation2.PreventthelasermarkSirecast3.Surfacecleanness4.Backsideoxidation&trapthemetalionZEROPhotoForASMLsteppersystemglobalWaferalignmentZEROFullydryetch(OX100A+SI1200+-200A)ZEROStrip1625ÅNitride110ÅPADOxideWaferMark(ForWaferalignment)ScrubberClean(TJBB)StartoxideRMNLH320A(50:1HF350sec)Meas:OxRMTHK(25~35A)AAOXPre-clnNCR1DH75ARCAMPadoxide110+-7A/920oCdryO2Asbufferlayertoreleasestress,duetoSINandSidifferentlatticeconstantNitrideDEP(w/Iscrubber)1625+-100A/760oCWaferStartSTOPLAYERofSTICMPSiONDEP(CVD)FEDARC320(w/Iscrubber)AAPhoto(120layer)AAEtch(5800A)SiN/Ox+Sietch(80+-2degree)AAAsherMattson(Rcp:1)Polymer&WetStripNDH15APRRMSC1M(100:1HF30sec)AATHKSTI-POPAD(5400+-160A)16250ÅNitride110ÅPADOxideAEI=0.25+-0.02ADI=0.23+-0.02STIETCHToreduceSINreflectionandimprovePRresolutionasanARClayerSTIPadOXPreClnNCR1DH75ARCAM(100:1HF180sec)STILinerOX1000C,DRYOX(200+-12A)Anneal(Diff)1100C,2hrs(Furnaceann.)HDPFillHDPCVDOX5.8KAW/OARsputterRTAPRECLNNRCAM(SC1+SC2)HDPCVDOXRTA1000RTA020S(1000C,20sec,N2)5800ÅHDP1625ÅNitride110ÅPADOxideHDPDepositionTobettershallowtrenchfillingFordamagereductionbyHDPandHDPoxdensificationPSubstratePadoxidePSubstrateAASiNAAReverseAARPhoto(121layer)AAR=(AA-0.4)+0.4)-0.2AAREtchStoponSiNAARAsherMattson(Rcp:1)AARwetstripNPRRM(SPMonly)PadoxidePSubstrateAASiN1.Bettersurfaceflatness2.ImprovedthroughputbyOXremovingSTIPre-CMPTHK-POPAD(6100+-225A)STIPolish&in-situCln(STI_XXXX)?CMP是磨到NIT上。STIPre-CMPTHK-POPAD(3600+-250A),SIN(1050+-50)AANITRMNLH90AHPO2450A(50:1HF+H3PO4)THINOXIDETHK-PPAD(82+-17)STIPADOXRMNLH60A(50:1HF65sec)SACOXPRECLNNCR1DH100ARCAM(100:1HF240sec)SACOX110+-7A/920oC45mindryO2AsimplantscreenoxideSTICMP&NITRM110ÅSACOxideN_WellPhoto(192layer)Implant:NWELLIMPP440K15E3T00WELLIMP注入的位置最深，用以调节井的浓度防止Latch-up效应。PCHANNELIMPP140K50E2T00CHANNELIMP位置较浅，加大LDD之下部位的WELL浓度，使器件工作时该位置的耗尽层更窄，防止器件PUNCHTHROUGH。VTPIMPA130K90E2T00VT注入，靠近器件表面，调节器件的开启电压NWELLAsherMattson:21NWELLWetStripSPMonlyNWELLAnnealPreclnMRCAM(SC1+SC2)IMPLANTDAMAGEANNEAL1000RTA010S(1000C;10secN2(PVD)N-WellP-WellP-VTP-pthruN-WellandVt_PadjustmentP_WellPhoto(191layer)Implant:PWELLIMPB160K15E3T00NCHANNELIMPB025K44E2T00N_VTIMPD170K70E2T00PWELLAsherMattson:21PWELLWetStripSPMonlyPWELLNpthruN_VTP-WellandVt_Nadjustment50Åthickgateoxide32Åthingateoxide2000ApolyFinal70AThick/ThinGateoxidedefineSACOXRMNLH60A(50:1HF65sec)SACOXTHK-POPAD(3200+-400A)GATE1_OXPreClnNCR1DH100ARCAMGATE1_OX800C,48A+-4A,wetDualGATEPhoto(131layer)(0.45+/-0.05um)GATE1ETCHN(NLB75A)GATE1StripSPMonlySTITHK-POPAD(3150+-180A)GATE2_OXPreClnNCRRCAMGATE2OX750C,27+-2A,wetThingateThickgatePOLYDEPOSITIONPOLY2000A,620CSiONDEPFEDARC320POLYPHOTO(130layer)PolyARCetch+PolyetchGATEAsherMattson(Rcp:1)GATEWetStripNDH5APRRM(100:1HF10sec+SPM)THICKGATEOXIDETHK-PPAD(25+-5A)SIONRMNLH5AHP0550A50:1HF+H3PO4GATERE-OxidationPreClnNRCA(SC1+SC2)PolyRe_Oxidation1015C,21ARTO(T1C,THK0.8A)N-WellP-WellADI0.18+-0.015umAEI0.18+-0.015umPolyGateDefinitiona.RecoverETCHdamagetoGOX.b.Preventnative-oxideForthermalbudget&goodoxideprofilearoundpolygateNLDD1Photo(116layer)Implant:NPocketimplant(D130K25E3T30R445)NLDDimplant(A003K80E4T00)NLDD1Asher&WetStrip(21+SPM)PLDD1Photo(113layer)Implant:PPocketimplant:(A130K30E3T30R445)PLDDimplant(F005K20E4T00)PLDD1Asher&WetStrip(21+SPM)N-WellP-WellNNPPLDD1Definition(Coredevice,1.8V)NLDD114maskPLDD113maskPLDDIMPNLDDIMPHotcarriereffectLDD2Definition(I/Odevice,3.3V)N-WellP-WellNNPPPLDDIMPNLDD116maskPLDD115maskNLDDIMPPLDD2(115layer)PLDD2PhotoPLDD2implant(F040K30E3T00)PLDD2Asher&WetStrip(21+SPM)PLDD2-RTA0950RTA010S(950C,10sec)NLDD2(114layer)NLDD2PhotoNLDD2implant(P040K40E3T00)NLDD2Asher&WetStrip(21+SPM)NitrideSpacerN-WellP-WellNNPPSPADep.PreclnNRCA(SC1+SC2)LININGTEOSDiff680C,150+-20ASiNSpacerDiff650C,300+-30AOXSpacerIMP680C,TEOS1000+-25ASPACERETCH(Oxide+SIN)PostCleanNCR(SPMonly)SPAPOSTTHKTRENCHOX(3100+-480,Avg.=3280A),THINOX(175+-20A)OxideStripNDH25A(100:1HF60sec)SPAPOSTOXSTRIPN-PAD(0~45,AVG=10A)CompositeSpacerONO,liningTEOS->SIN->TEOSN+N+Photo(198layer)N+implant1(A060K51E5T00)N+implant2(P035K15E4T00)Asher&WetStrip(22+SPM&APM)N+Anneal1025RTA020S(1025C,20sN2)P+P+Photo(197layer)P+Implant1(B005K33E5T00)P+Implant2(B015K30E3T00)Asher&WetStrip(22+SPM&APM)N-WellP-WellP+N+N+P+NP&PPDefinitionNSD198maskPSD197maskNSDIMPPSDIMPTwotimesSN+/SP+IMP,toreduceconcentrationbetweenS/DandWELLtooptimizeleakage.Highdoseimp.willcausePRresiduemoreeasilyESDESDPHOTO(72HRQTIMEtoP+IMP1),110layerESDOVERLAYESDCD-PHESDADIYEDEFECTINSPECTIONYEDEFECTINSPECTIONESDIMP(B050K25E3T00)ESDASHERESDWETSTRIP(NPRRM)ESDASIESDBackupSlipESD:ElectroStaticDischarge.ElectronwillgenerateinProcessanddamagecircuitbydischargingwithHighVoltageandHighcurrent.Pre-clnNRCAM(100:1HF60sec)SABCapOxSRO350AP+RTAAnnealingPVD1015RTA010S(1015C,10sec)PostP+RTATHK-POPAD(3400+-400,Avg.=3470A)SABPhoto(155layer)SalicideBlockEtchDry+WETETCHSABAsher+wetstrip(32+SPM&APM)SABTHKTRENCHOX-POPAD(3100+-400,Avg.=3000A)N-WellP-WellSalBlkPETEOSP+P+N+N+SalicideBlockPre-COoxideRMNDH25A(100:1HF60sec)ChangeCoPod&CassetteSalicideDeposition(E30C85N20)(Arsputter30A/Co85A/TiN200A)Salicide1stRTA(530oC30secN2)N-WellP-WellCOSailcideP+P+N+N+SalicideSelectiveEtchNSC1M2SC1NH4OH:H2O2:H2O1:1:5M2H3PO4:HNO3:CH3COOH70:02:12Salicide2ndRTA(850oC30secN2)CoSalicideArsputter30Awilletchnatureoxide30A;PE-SION400ADEPCVDHKSION400highkmaterialChangeBEOLPod&CassetteILDBPTEOSDepositionCVD31B65P2K480CBPTEOSFLOWIMP650C,N2,30minCRCleanNCR(SPMonly)PETEOSdepositionCVD10.5KILDPRE-CMPTHK-PPAD(12500+-900,Avg.=12350A)OxCMPforILD7.5KILDPOST-CMPTHK-PPAD(7500+-600,Avg.=7560A)ILDCRCleanNCR(SPMonly)N-WellP-WellP+P+N+N+2kÅSABPSG10.5kÅPETEOS400ÅSIONILDDepositionCTDARCCVD(SiON/OX-200A/600A)ScrubberCTPhoto(156layer)ADICD0.255+/-0.02umAEICD0.225+/-0.025umCTetchCTAsher41ChangeCoPod&CassetteCTwetstrip(sendtoFAB1Backup)NPRRMSC1MChangeBEOLPod&CassetteN-WellP-WellP+P+N+N+ContactCONTGLUELAYERPVDETCH100A/IMPTI200A/CVD-TIN50ASilicideannealing(690ºC,N260s)3.3kÅWCVDDEPWCMPWTi/TiNN-WellP-WellP+P+N+N+W-PlugMET1GLUE(200Ti/250TiN)MET1Acu(4000AlCu/50Ti/300TiN)ScrubberInorganicBARC320AScrubberM1Photo(160layer)ADICD0.22+/-0.015umAEICD0.24+/-0.02umM1etchM1wetstripEKCPureH2AlloyPVD(410C,90sec)Metal1N-WellP-WellP+P+N+N+Met1SROLinerDep.CVDSiliconRichOxideHDP6KÅCVDPE-FSGDep.11.5KÅCVD(FluorinatedSilicateGlass),IMD1CMPIn-situPE-N2treatment&USGCap2K(UndopedSilicateGlass),1.CoverFSGlayer2.PreventF-diffusive.3TopreventmetalavoidOxCMPforIMDIMD1(SiON/OX-600A+200A)Via1Photo(178layer)ADICD0.285+/-0.02umAEICD0.275+/-0.025umVia1etchVia1Asher&Wetstrip(41+NEKC30)Met1N-WellP-WellP+P+N+N+6kÅHDP11.5kÅPETEOSIMD1&Via1Met1N-WellP-WellP+P+N+N+VacuumBake(300C)VIAGLUELAYERETCH130/160Ti/70TiN(IMP/CVD)3.3kÅWInter-metalDep.(M2~M5)ScrubberSION320Dep.ScrubberInter-metalPho(M2~M5,180-184)ADICD0.26+/-0.02umAEICD0.28+/-0.025umInter-metalEtch(M2~M5)WetstripMet1N-WellP-WellP+P+N+N+160ÅTi/70ÅTiNInter-metalMet1N-WellP-WellP+P+N+N+Met2Met3Met4Met5IMD2~IMD5SROLinerDep.HDP6KÅCVD(Goodfillingcapability，slowgrowthrateandhighcost)PE-FSGDep.11.5KÅCVD(Cheapandhighgrowthrate）IMDx(x=2~5)CMPIn-situPE-N2treatment&USGCap2K(IMD5Cap3.5K)OxCMPforIMDIMDx(x=2~5)(SiON/OX-600A+200A)Viax(x=2~4)Photo(175-179)ADICD0.285+/-0.02umAEICD0.275+/-0.025umViax(x=2~4)etchViax(x=2~4)Asher&Wetstrip(41+NEKC30)Met1N-WellP-WellP+P+N+N+Met2SROLinerDep.PE-FSGDep.11.5KÅIn-situPE-N2treatment&USGCap3.5KSurfacenitrigenationIMD5CMPIMD5ARC(SiON/OX-600A+200)Via5PhotoADICD0.4+/-0.04umVia5etchAEICD0.39+/-0.04umVia5Asher&Wetstrip(41+NEKC30)Via5WDep.4000AWC5W_CMPMET6GLUE(200Ti/250TiN)MET6AlCu(8000AlCu/375TiN).M6PhotoADICD0.49+/-0.045um(line)M6etchAEICD0.51+/-0.05umM6wetstripN-WellP-WellP+P+N+N+Met1Met2Met3Met4Met5Met6TopVia&TopMetal10kÅHDPoxidedepPE-SION1.5KDEPCVDPE-SIN6KDEPCVDPDPhotoforbondpadHDPpassivationetchResistStripAlloy-410ºC,30’PVDN-WellP-WellP+P+N+N+Met1Met2Met3Met4Met5Met61.5kÅSION+6kASIN10kÅHDPPassivationQ&AThanks1為何需要StartOxide?AnsForzerolayerPHOprocess,beforePHOPRdeposition,thereneedbufferoxidetoisolatePRmaterialontouchwithSi.ZerolayerisdesignedbyASMLsteppersystem.PreventthelasermarkSirecastbeingre-depositedontoSisurfacedirectly,becauseSiishydrophobiclikeandthesere-depo.Particleisveryhardtoberinseoff.AsthefirstHIGHtemperaturecycleforH-L-Hdenudedzone(oxygenfreetreatment).Pre-setthesurfacecleannessconditionrightafterFabreceivedthenewwafermaterials.ZERO-STARTWAFERSTART(PTYPE、8-12OHM/SQ)START-OXBCLN1(22220A)SPM60/HF180/APM420/HPM180/HF0START-OXSTARTOX(1100C；350A)ZERO-PHOZEROPHOTO(ALIGNMENTMASKAT55DEG)ZERO-ETCHZEROFULLYDRYETCH(OX350A+SI1200A)ZERO-ETCHRESISTSTRIPPING(PSC)PARTIALSTRIPZERO-ETCHPRCARO’SSTRIP(ETCH)SPM+APM由上表可以很明顯地看出StartOX的第一個功用，就是不希望為有機成分(C-Hbond)的光阻直接碰觸到矽晶圓表面。在電子級的矽晶圓中，氧及碳雜質是無法完全被移除的，一般的含量約為1016cm-3左右。除以固溶態(Solidsolution)存在外，也會以微析出物(Micro-precipitates)的形式存在於矽晶圓中。這些絕緣的微析出物將會引致在空乏區(Depletionregion)的電力場(Fieldline)彎曲，而造成局部的電場梯度(Fieldgradient)變大，因此在較低的電壓就有可能造成接面崩潰(Junctionbreakdown)。另一方面碳氧雜質無論是以插入(Interstitial)或替代(Substitutional)的方式固溶於矽晶圓中也容易變成佈植雜質(Dopant)或缺陷集中的中心。 StartOX的另一個用途則是在WAFERSTART刻雷射刻號時高功率雷射入射矽晶圓表面引致的融渣會在STARTOXREMOVE後被移除，不過FAB5目前是使用Soft-laser來作刻號，並不會有這個問問題。另外wafer中总会含有metalion,在wafer背面掺入oxygen,hightemperatureprocesstheoxygeninthewafercantrapthemetalion.AnsZerolayer2為何需要Zerolayer?LaserMark?ASMLsteppersystemrequiresazeromarkforglobalalignmentpurpose.ForASML300Btheoverlayspecforsinglemachineis<45nm,formated300Bmachine<75nmandfor300to200machine<95nm.TheoverlayperformanceisthebasiccharacteristicofstateofartStepper.UsezerolayerglobalalignmentmarksystemcanhelptoimprovetheOVLperformance.(OVL156_120)2=(OVL156_0)2+(OVL120_0)2LasermarkWaferidentification(includeLotid,waferID)Laser-mark是wafer在FAB內身份證明，由11碼組成：例如：F12345-01XX前6碼代表LotID第7碼為-第8,9碼為WaferID(01~25)第10,11碼為序號SMICreferncetoLotIDnamingruleandlottypenamingruleAnsZerolayer定义:Latchup是指cmos晶片中,在电源powerVDD和地线GND(VSS)之间由于寄生的PNP和NPN双极性BJT相互影响而产生的一低阻抗通路,它的存在会使VDD和GND之间产生大电流.(PhotoelectronorionizingfromcircumstancewillinduceleakagecurrentinWELL-SUBjunction.)----Latchup产生的过度电流量可能会使芯片产生永久性的破坏,Latchup的防范是ICLayout的最重要措施之一---- 随着IC制造工艺的发展,封装密度和集成度越来越高,产生Latchup的可能性会越来越大p-subn-wellVss(gnd)VddVoutVinRwRsubP+P+P+n+n+n+ssddTakingN-WELLCMOSdeviceasanexample,its4terminals(P+,N-WELL,P-SUB,N+)willformaparasiticcircuitwhichinclude2couplingbipolardevice.工艺级抗闩锁措施：(1)降低少数载流子的寿命可以减少寄生双极型晶体管的电流增益，一般使用金掺杂或中子辐射技术，但此方法不易控制且也会导致漏电流的增加。(2)后退阱技术，可以减小寄生三极管的阱电阻，防止寄生三极管EB结导通。(3)另一种减少闩锁效应的方法，是将器件制作于重掺杂衬底上的低掺杂外延层中。重掺杂衬底提供一个收集电流的高传导路径，降低了RS，若在阱中加入重掺杂的p+埋层(或倒转阱)，又可降低RW。实验 证明 住所证明下载场所使用证明下载诊断证明下载住所证明下载爱问住所证明下载爱问 ,此方法制造的CMOS电路有很高的抗闩锁能力。(4)闩锁亦可通过沟槽隔离结构来加以避开。在此技术中，利用非等向反应离子溅射刻蚀，刻蚀出一个比阱还要深的隔离沟槽。接着在沟槽的底部和侧壁上生长一热氧化层，然后淀积多晶硅或二氧化硅，以将沟槽填满。因为n沟道与p沟道MOSFET被沟槽所隔开，所以此种方法可以消除闩锁。（5）以上措施都是对传统CMOS工艺技术的改造，更先进的工艺SOI(SilicononInsulator)等能从根本上来消除闩锁产生，但工艺技术相对来讲要复杂一些。15、什么是PUNCHTHROUGH，为消除它有哪些手段？PUNCHTHROUGH是指器件的S、D因为耗尽区相接而发生的穿通现象。S、D对于SUB有各自的耗尽区。当器件尺寸较小时，只要二者对衬底的偏压条件满足，就可能发生PUNCHTHROUGH效应。这样，不论GATE有无开启都会有PUNCHTHROUGH产生的电流流过S、D。极大的降低电子产品的功耗在制程中，采用POCKET和CHANNELIMP来加大容易发生PUNCHTHROUGH位置的SUB浓度，从而减小器件工作时在该处产生的耗尽层宽度以达到避免PUNCHTHROUGH发生的效果。(耗尽层的宽度与掺杂浓度的平方成反比，)