ACER_E1-471G DAZQSAMB6E0_REV_E_ZQTA_ZQSA_1A

5 5 4 4 3 3 2 2 1 1 D D C C B B A A Size Document Number Rev Date: Sheet of Quanta Computer Inc. PROJECT : Block Diagram 1A 1 44Friday, November 11, 2011 ZQTA/ZQSA Size Document Number Rev Date: Sheet of Quanta Computer Inc. PROJECT : Block Diagram 1A 1 44Friday, November 11, 2011 ZQTA/ZQSA Size Document Number Rev Date: Sheet of Quanta Computer Inc. PROJECT : Block Diagram 1A 1 44Friday, November 11, 2011 ZQTA/ZQSA =47$�=46$�&59�6<67(0�%/2&.�',$*5$0 Azalia P31 EC NPCE885L EM-6781-T3 HALL SENSOR P32 P31 ALC271X-VB6 AUDIO CODEC P26 P22 HP P27 Int. MIC MIC JACK P27 Touch Pad Board Con.K/B Con. RTL8411 10/100/1G P28 PCIE-3 RJ45 P28 MINI CARD WLAN USB-10 PCIE-8 P25 CLK SATA 1 P25 SATA - ODD USB3-2/USB2-1 USB2-4 Bluetooth Con. SATA - HDD P25 Display GFXIMC rPGA 989 P3, 4, 5, 6 FDI PCI-E x1 PCH Panther Point SATA DMI P7, 8, 9, 10, 11, 12 FDI P8 SPI ROM DMI(x4) DMI IHDA LPC Dual Channel DDR IIIDDRIII-SODIMM1 DDRIII-SODIMM2 1066/1333/1600 MHZ P13, 14 SPI IVY Bridge P31 SATA 0 (PWM Type) P31 Fan Driver HDMI Con. INT_CRT INT_HDMI P23 BATTERYP8 RTC X'TAL 32.768KHz X'TAL 25MHz P33 BQ24707A Batery Charger P33 RT8223P 3V/5V P39 P40 MDV1660URH +1.5V_GFX/1.05V_GFX/3V_GFX P37 P38 RT8241A VCCSA TPS51219 +1.05V_PCH / +1.05V_VTT TPS51216 +1.5V_SUS P35 ISL95836 CPU core/VAXG P36 P41 Discharger Thermal Protection Speaker P27 eDP Con. P22 eDP CRT Con. P22 N13P-GS N13P-GL N13M-GS P15~P19 PEG TX/RX VRAM P20,P21 CLK P29 Cardreader CONN. Cardreader MINI-SSD P24 TPS51728 VGPU Core LVDS/CCD/MIC Con. USB-8 Int. MIC P22INT_LVDS USB-9 P29 USB3 Port MB side USB2.0 USB2-8 CCD(Camera) P22 USB3.0/2.0 Small Board CONNECTOR P31 USB2-1,3 eDP Display DIS._HDMI DIS._CRT DIS._eDP DIS._LVDS INT._eDP P29 USB Charger SATA SATA5 GPU BOM IV@ : iGPU EV@ : dGPU OP@ : Optimus DO@ : Discrete only SP@ : Special SNP@: N13PGS/GL IV@: UMA GL@: N13PGL GS@: N13P/MGS Optimus : IV@ + EV@ + OP@ Discrete only : EV@ + DO@ 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 A A B B C C D D Size Document Number Rev Date: Sheet of Quanta Computer Inc. PROJECT : PWR Status & GPU PWR CRL & THRM 1A 2 44Friday, November 11, 2011 ZQTA/ZQSA Size Document Number Rev Date: Sheet of Quanta Computer Inc. PROJECT : PWR Status & GPU PWR CRL & THRM 1A 2 44Friday, November 11, 2011 ZQTA/ZQSA Size Document Number Rev Date: Sheet of Quanta Computer Inc. PROJECT : PWR Status & GPU PWR CRL & THRM 1A 2 44Friday, November 11, 2011 ZQTA/ZQSA Thermal Follow Chart CPU PM_THRMTRIP# NTC Thermal Protection SYS_SHDN# 3V/5 V SYS PWRWIRE-AND CPU CORE PWR H_PROCHOT# H/W Throttling PCH EC SM-Bus FANFAN Driver CPUFAN# SML1ALERT# CONTROL SIGNAL +1.5V LAN/BT/CIR POWER CHARGE PUMP POWER EC POWER RTC POWER CHARGE POWER USB POWER S0-S5 S0-S3 S0-S5 S0 S0 S0 S0 S0 +VGFX_AXG S0VRONInternal GPU POWERvariation variation ALWAYS ALWAYSMAIN POWER +5V VOLTAGE ALWAYS LCD POWER MAINON ALWAYS ALWAYS ALWAYS ALWAYS ALWAYSALWAYS ALWAYS +3V_RTC CPU/PCH/Braidwood POWER +3.3V +3.3V +3V~+3.3V +10V~+19V +5V +5V +3.3V +5V +0.75V +1.8V +1.5V +15V MAINON +1.5V MAINON +3.3V CPU/SODIMM CORE POWER VIN +1.05V HDD/ODD/Codec/TP/CRT/HDMI POWER +VCC_CORE ACTIVE INDESCRIPTION S0 S0 S0 S0CPU POWER +5V_S5 MINI CARD/NEW CARD POWER SODIMM Termination POWER CPU CORE POWER +1.05V MAINON SUSON LCDVCC PCH/GPU/Peripheral component POWER+3V +15V +5VPCU +3VPCU +1.5VSUS VRON LVDS_VDDEN MAINON PCH CORE POWER/IVY/SNB bridge VCCIO MAINON S5_ON +VCCSA HWPG_VTT+0.9V +3V_S5 +0.75V_DDR_VTT +1.8V S5_ON POWER PLANE Power States MAINON S0 +3V dGPU_RWR_EN EC +3V_GFX VIN dGPU_VRON MOSFET VGA_VID PWM +VGACORE VGA power up sequence VGA_PG +1.5V_GFXMOSFET +1.5VSUS MOSFET +1.05V +1.05V_GFX DGPU_PWROK VGA_PG +1.8V_GFXMOSFET +1.8V 5 5 4 4 3 3 2 2 1 1 D D C C B B A A TP_CATERR# PM_SYNC PM_THRMTRIP# SM_RCOMP_0 CPU_DRAMRST# SM_RCOMP_2 XDP_TCLK XDP_PREQ# XDP_PRDY# SM_RCOMP_1 SKTOCC# CLK_CPU_BCLKP PM_DRAM_PWRGD_R PEG_COMP eDP_COMP CLK_CPU_BCLKN eDP_COMP XDP_TRST# PCH_JTAG_TDI XDP_PREQ# XDP_TCLK PCH_JTAG_TMS H_PWRGOOD H_PROCHOT# PEG_COMP XDP_BPM5 XDP_BPM1 XDP_BPM6 XDP_BPM2 XDP_BPM7 XDP_BPM3 XDP_BPM4 XDP_BPM0 H_PROCHOT#_R PM_THRMTRIP# H_SNB_IVB# H_PROCHOT# CPU_PLTRST#_R CLK_DPLL_SSCLKN_R CPU_PLTRST# CPU_PLTRST# R_PEG_TX#0 R_PEG_TX#1 R_PEG_TX#2 R_PEG_TX#3 R_PEG_TX#4 R_PEG_TX#5 R_PEG_TX#6 R_PEG_TX#7 R_PEG_TX#8 R_PEG_TX#9 R_PEG_TX#10 R_PEG_TX#11 R_PEG_TX#12 R_PEG_TX#13 R_PEG_TX#14 R_PEG_TX#15 R_PEG_TX0 R_PEG_TX1 R_PEG_TX2 R_PEG_TX3 R_PEG_TX4 R_PEG_TX5 R_PEG_TX6 R_PEG_TX7 R_PEG_TX8 R_PEG_TX9 R_PEG_TX10 R_PEG_TX11 R_PEG_TX12 R_PEG_TX13 R_PEG_TX14 R_PEG_TX15 XDP_TRST# PCH_JTAG_TMS PCH_JTAG_TDI PCH_JTAG_TDO CLK_DPLL_SSCLKP_R PM_DRAM_PWRGD_RPM_DRAM_PWRGD_Q MAINON_ON_G PCH_JTAG_TDO FDI_INT FDI_FSYNC0 FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1 DMI_TXN0[7] DMI_TXN1[7] DMI_TXN2[7] DMI_TXN3[7] DMI_TXP0[7] DMI_TXP1[7] DMI_TXP2[7] DMI_TXP3[7] DMI_RXN0[7] DMI_RXN1[7] DMI_RXN2[7] DMI_RXN3[7] DMI_RXP0[7] DMI_RXP1[7] DMI_RXP2[7] DMI_RXP3[7] FDI_TXN0[7] FDI_TXN1[7] FDI_TXN3[7] FDI_TXN2[7] FDI_TXN5[7] FDI_TXN7[7] FDI_TXN6[7] FDI_TXN4[7] FDI_TXP1[7] FDI_TXP5[7] FDI_TXP7[7] FDI_TXP6[7] FDI_TXP4[7] FDI_TXP3[7] FDI_TXP2[7] FDI_TXP0[7] FDI_FSYNC0[7] FDI_FSYNC1[7] FDI_INT[7] FDI_LSYNC1[7] FDI_LSYNC0[7] EC_PECI[32] PM_SYNC[7] H_PWRGOOD[10] CLK_CPU_BCLKN [9] XDP_DBRST# [7] CLK_CPU_BCLKP [9] CLK_DPLL_SSCLKN [9] CLK_DPLL_SSCLKP [9] H_SNB_IVB#[8] PM_THRMTRIP#[10] SYS_SHDN# [34,41] IMVP_PWRGD[7,35] H_PROCHOT#[32,35] PCI_PLTRST#[9] CPU_DRAMRST# [4] PEG_TX#0 [15] PEG_RX15 [15] PEG_RX#15 [15] PEG_RX14 [15] PEG_RX#14 [15] PEG_RX13 [15] PEG_RX#13 [15] PEG_RX12 [15] PEG_RX#12 [15] PEG_RX11 [15] PEG_RX#11 [15] PEG_RX10 [15] PEG_RX#10 [15] PEG_RX7 [15] PEG_RX#7 [15] PEG_RX6 [15] PEG_RX#6 [15] PEG_RX5 [15] PEG_RX#5 [15] PEG_RX4 [15] PEG_RX#4 [15] PEG_RX9 [15] PEG_RX#9 [15] PEG_RX8 [15] PEG_RX#8 [15] PEG_RX3 [15] PEG_RX#3 [15] PEG_RX2 [15] PEG_RX#2 [15] PEG_RX1 [15] PEG_RX#1 [15] PEG_RX0 [15] PEG_RX#0 [15] PEG_TX#1 [15] PEG_TX#3 [15] PEG_TX#2 [15] PEG_TX#5 [15] PEG_TX#7 [15] PEG_TX#6 [15] PEG_TX#4 [15] PEG_TX#9 [15] PEG_TX#11 [15] PEG_TX#10 [15] PEG_TX#13 [15] PEG_TX#15 [15] PEG_TX#14 [15] PEG_TX#12 [15] PEG_TX#8 [15] PEG_TX1 [15] PEG_TX3 [15] PEG_TX2 [15] PEG_TX5 [15] PEG_TX7 [15] PEG_TX6 [15] PEG_TX4 [15] PEG_TX9 [15] PEG_TX11 [15] PEG_TX10 [15] PEG_TX13 [15] PEG_TX15 [15] PEG_TX14 [15] PEG_TX12 [15] PEG_TX8 [15] PEG_TX0 [15] INT_eDP_HPD_Q[22] EDP-ML0+[22] EDP-AUX-[22] EDP-AUX+[22] EDP-ML0-[22] +1.05V[5,7,8,9,11,22,32,35,36,40,41] +3V[7,8,9,10,11,13,14,19,22,23,24,25,26,27,28,31,32,34,35,36,37,38,39,40,41] SYS_PWROK[7] PM_DRAM_PWRGD[7] MAINON_ON_G [5,41] +1.05V +1.05V +1.05V +1.05V +1.05V +1.05V +3V +1.5V_CPU +3V_S5 Size Document Number Rev Date: Sheet of Quanta Computer Inc. PROJECT : IVY Bridge 1/4 1A Friday, November 11, 2011 ZQTA/ZQSA 3 44 Size Document Number Rev Date: Sheet of Quanta Computer Inc. PROJECT : IVY Bridge 1/4 1A Friday, November 11, 2011 ZQTA/ZQSA 3 44 Size Document Number Rev Date: Sheet of Quanta Computer Inc. PROJECT : IVY Bridge 1/4 1A Friday, November 11, 2011 ZQTA/ZQSA 3 44 IVY Bridge Processor (DMI,PEG,FDI) IVY Bridge Processor (CLK,MISC,JTAG) DP & PEG Compensation PEG_ICOMPI and RCOMPO signals should be routed within 500 mils typical impedance = 43 mohms PEG_ICOMPO signals should be routed within 500 mils typical impedance = 14.5 mohms eDP_COMPIO and ICOMPO signals should be shorted near balls and routed with typical impedance <25 mohms Processor pull-up(CPU) This signal can be left as no connect if entire eDP interface is disabled. HPD disable DG 1.0 : The recommended AC cap value is changed to 220nF for compatibility with PCIe Gen3 on future platforms. For Gen2 only designs, it is acceptable to continue to use the 100nF capacitor. For Sandy Bridge processor only implementation: PROC_SELECT can be left NC. For IVY/Sandy processor compatibility: Needs a pull-up resistor to PCH VccDFTERM rail (1.8V) through a 2.2 K±5% pull-up resistor. Connect to the DF_TVS of PCH though a 1K±5% series resistor. wo eDP and dGPU Connect DPLL_REF_SSCLK on Processor to GND through 1K ± 5% resistor. Connect DPLL_REF_SSCLK# on Processor to VCCP through 1K ± 5% resistor apply C5205 for nosie PEG_COMP connect to PIN H22&J22 W:4mils/S:15mils/L: 500mils. PEG_COMP connect to PIN J21 W:12mils/S:15mils/L: 500mils. CRB 1.0 : SM_RCOMP[2..0] W:20mils, S:15mils, L 500mils Intel recommended UNCOREPWRGOOD routing on one layer CRB 1.0 : change to +3V(S0) Routed within 500 mils Routed within 25 mils For XDP Ra Rb Rc Ra Rb Rc EV UMA/OPT. 1K NA 1K 0 ohm NA NA FDI_FSYNC can gang all these 4 signals together and tie them with only one 1K resistor to GND (DG V0.5 Ch2.2.9). FDI Disabling (Discrete Only) 9/26 add 9/27 modify C433 EV@0.22u/6.3V_4C433 EV@0.22u/6.3V_4 TP49TP49 R113 43_4R113 43_4 C430 EV@0.22u/6.3V_4C430 EV@0.22u/6.3V_4 C L O C K S M I S C T H E R M A L P W R M A N A G E M E N T D D R 3 M I S C J T A G & B P M U16B Ivy Bridge_rPGA_2DPC_Rev0p61 C L O C K S M I S C T H E R M A L P W R M A N A G E M E N T D D R 3 M I S C J T A G & B P M U16B Ivy Bridge_rPGA_2DPC_Rev0p61 SM_RCOMP[1] A5 SM_RCOMP[2] A4 SM_DRAMRST# R8 SM_RCOMP[0] AK1 BCLK# A27 BCLK A28 DPLL_REF_CLK# A15 DPLL_REF_CLK A16 CATERR#AL33 PECIAN33 PROCHOT#AL32 THERMTRIP#AN32 SM_DRAMPWROKV8 RESET#AR33 PRDY# AP29 PREQ# AP27 TCK AR26 TMS AR27 TRST# AP30 TDI AR28 TDO AP26 DBR# AL35 BPM#[0] AT28 BPM#[1] AR29 BPM#[2] AR30 BPM#[3] AT30 BPM#[4] AP32 BPM#[5] AR31 BPM#[6] AT31 BPM#[7] AR32 PM_SYNCAM34 SKTOCC#AN34 PROC_SELECT#C26 UNCOREPWRGOODAP33 R107 75_4R107 75_4 TP51TP51 R173 140/F_4R173 140/F_4 R460 200/F_4R460 200/F_4 C167 0.1u/10V_4 C167 0.1u/10V_4 C165 0.1u/10V_4C165 0.1u/10V_4 C428 EV@0.22u/6.3V_4C428 EV@0.22u/6.3V_4 C424 EV@0.22u/6.3V_4C424 EV@0.22u/6.3V_4 TP45TP45 R440 IV@0_4P2RR440 IV@0_4P2R 2 4 1 3 R116 10K_4R116 10K_4 R447 DO@1K/F_4 R447 DO@1K/F_4 P C I E X P R E S S * - G R A P H I C S D M I I n t e l ( R ) F D I e D P U16A Ivy Bridge_rPGA_2DPC_Rev0p61 P C I E X P R E S S * - G R A P H I C S D M I I n t e l ( R ) F D I e D P U16A Ivy Bridge_rPGA_2DPC_Rev0p61 DMI_RX#[0]B27 DMI_RX#[1]B25 DMI_RX#[2]A25 DMI_RX#[3]B24 DMI_RX[0]B28 DMI_RX[1]B26 DMI_RX[2]A24 DMI_RX[3]B23 DMI_TX#[0]G21 DMI_TX#[1]E22 DMI_TX#[2]F21 DMI_TX#[3]D21 DMI_TX[0]G22 DMI_TX[1]D22 DMI_TX[3]C21 DMI_TX[2]F20 FDI0_TX#[0]A21 FDI0_TX#[1]H19 FDI0_TX#[2]E19 FDI0_TX#[3]F18 FDI1_TX#[0]B21 FDI1_TX#[1]C20 FDI1_TX#[2]D18 FDI1_TX#[3]E17 FDI0_TX[0]A22 FDI0_TX[1]G19 FDI0_TX[2]E20 FDI0_TX[3]G18 FDI1_TX[0]B20 FDI1_TX[1]C19 FDI1_TX[2]D19 FDI1_TX[3]F17 FDI0_FSYNCJ18 FDI1_FSYNCJ17 FDI_INTH20 FDI0_LSYNCJ19 FDI1_LSYNCH17 PEG_ICOMPI J22 PEG_ICOMPO J21 PEG_RCOMPO H22 PEG_RX#[0] K33 PEG_RX#[1] M35 PEG_RX#[2] L34 PEG_RX#[3] J35 PEG_RX#[4] J32 PEG_RX#[5] H34 PEG_RX#[6] H31 PEG_RX#[7] G33 PEG_RX#[8] G30 PEG_RX#[9] F35 PEG_RX#[10] E34 PEG_RX#[11] E32 PEG_RX#[12] D33 PEG_RX#[13] D31 PEG_RX#[14] B33 PEG_RX#[15] C32 PEG_RX[0] J33 PEG_RX[1] L35 PEG_RX[2] K34 PEG_RX[3] H35 PEG_RX[4] H32 PEG_RX[5] G34 PEG_RX[6] G31 PEG_RX[7] F33 PEG_RX[8] F30 PEG_RX[9] E35 PEG_RX[10] E33 PEG_RX[11] F32 PEG_RX[12] D34 PEG_RX[13] E31 PEG_RX[14] C33 PEG_RX[15] B32 PEG_TX#[0] M29 PEG_TX#[1] M32 PEG_TX#[2] M31 PEG_TX#[3] L32 PEG_TX#[4] L29 PEG_TX#[5] K31 PEG_TX#[6] K28 PEG_TX#[7] J30 PEG_TX#[8] J28 PEG_TX#[9] H29 PEG_TX#[10] G27 PEG_TX#[11] E29 PEG_TX#[12] F27 PEG_TX#[13] D28 PEG_TX#[14] F26 PEG_TX#[15] E25 PEG_TX[0] M28 PEG_TX[1] M33 PEG_TX[2] M30 PEG_TX[3] L31 PEG_TX[4] L28 PEG_TX[5] K30 PEG_TX[6] K27 PEG_TX[7] J29 PEG_TX[8] J27 PEG_TX[9] H28 PEG_TX[10] G28 PEG_TX[11] E28 PEG_TX[12] F28 PEG_TX[13] D27 PEG_TX[14] E26 PEG_TX[15] D25 eDP_AUXC15 eDP_AUX#D15 eDP_TX[0]C17 eDP_TX[1]F16 eDP_TX[2]C16 eDP_TX[3]G15 eDP_TX#[0]C18 eDP_TX#[1]E16 eDP_TX#[2]D16 eDP_TX#[3]F15 eDP_COMPIOA18 eDP_HPDB16 eDP_ICOMPOA17 R122 62_4R122 62_4 C422 EV@0.22u/6.3V_4C422 EV@0.22u/6.3V_4 C414 EV@0.22u/6.3V_4C414 EV@0.22u/6.3V_4 Q4 FDV301N Q4 FDV301N 3 2 1 C407 EV@0.22u/6.3V_4C407 EV@0.22u/6.3V_4 R461 200/F_4 R461 200/F_4 R462 *39_4R462 *39_4 R446 DO@0_4R446 DO@0_4 R132 *51_4R132 *51_4 C417 EV@0.22u/6.3V_4C417 EV@0.22u/6.3V_4 TP19TP19 C408 EV@0.22u/6.3V_4C408 EV@0.22u/6.3V_4 C405 EV@0.22u/6.3V_4C405 EV@0.22u/6.3V_4 TP20TP20 R128 51_4R128 51_4 R459 130/F_4R459 130/F_4 TP12TP12 C406 EV@0.22u/6.3V_4C406 EV@0.22u/6.3V_4 Q5 MMBT3904 Q5 MMBT3904 2 1 3 C400 EV@0.22u/6.3V_4C400 EV@0.22u/6.3V_4 TP50TP50 TP56TP56 TP47TP47 C401 EV@0.22u/6.3V_4C401 EV@0.22u/6.3V_4 TP18TP18 TP52TP52 C440 EV@0.22u/6.3V_4C440 EV@0.22u/6.3V_4 R115 *750/F_4 R115 *750/F_4 R134 51_4R134 51_4 TP54TP54 C444 EV@0.22u/6.3V_4C444 EV@0.22u/6.3V_4 C434 EV@0.22u/6.3V_4C434 EV@0.22u/6.3V_4 TP53TP53 R439 24.9/F_4R439 24.9/F_4 C436 EV@0.22u/6.3V_4C436 EV@0.22u/6.3V_4 C425 EV@0.22u/6.3V_4C425 EV@0.22u/6.3V_4 R86 1K_4 R86 1K_4 R438 DO@1K_4R438 DO@1K_4 R135 51_4R135 51_4 R441 DO@1K/F_4 R441 DO@1K/F_4 R137 51_4R137 51_4 C427 EV@0.22u/6.3V_4C427 EV@0.22u/6.3V_4 C421 EV@0.22u/6.3V_4C421 EV@0.22u/6.3V_4 C418 EV@0.22u/6.3V_4C418 EV@0.22u/6.3V_4 R443 DO@0_4R443 DO@0_4 R433 24.9/F_4R433 24.9/F_4 TP46TP46 R444 DO@0_4R444 DO@0_4 R430 51_4R430 51_4 C420 EV@0.22u/6.3V_4C420 EV@0.22u/6.3V_4 R458 25.5./F_4R458 25.5./F_4 U3 74LVC1G07GW U3 74LVC1G07GW VCC 5NC1 GND3 OUT 4 IN2 C419 EV@0.22u/6.3V_4C419 EV@0.22u/6.3V_4 C413 EV@0.22u/6.3V_4C413 EV@0.22u/6.3V_4 Q30 *2N7002KQ30 *2N7002K 3 2 1 TP58TP58 TP59TP59 C516 0.1u/10V_4 C516 0.1u/10V_4 C409 EV@0.22u/6.3V_4C409 EV@0.22u/6.3V_4 C402 EV@0.22u/6.3V_4C402 EV@0.22u/6.3V_4 R124 56_4R124 56_4 U18 74AHC1G09 U18 74AHC1G09 2 1 4 3 5 C404 EV@0.22u/6.3V_4C404 EV@0.22u/6.3V_4 TP11TP11 TP55TP55 C439 EV@0.22u/6.3V_4C439 EV@0.22u/6.3V_4 C398 EV@0.22u/6.3V_4C398 EV@0.22u/6.3V_4 C395 EV@0.22u/6.3V_4C395 EV@0.22u/6.3V_4 C437 EV@0.22u/6.3V_4C437 EV@0.22u/6.3V_4 C431 EV@0.22u/6.3V_4C431 EV@0.22u/6.3V_4 R114 *1.5K/F_4R114 *1.5K/F_4 R442 DO@1K_4R442 DO@1K_4 5 5 4 4 3 3 2 2 1 1 D D C C B B A A M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ10 M_A_DQ11 M_A_DQ13 M_A_DQ12 M_A_DQ14 M_A_DQ15 M_A_DQ8 M_A_DQ9 M_A_DQ18 M_A_DQ19 M_A_DQ21 M_A_DQ20 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ31 M_A_DQ30 M_A_DQ28 M_A_DQ29 M_A_DQ27 M_A_DQ26 M_A_DQ25 M_A_DQ16 M_A_DQ17 M_A_DQ34 M_A_DQ35 M_A_DQ37 M_A_DQ36 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ47 M_A_DQ46 M_A_DQ44 M_A_DQ45 M_A_DQ43 M_A_DQ42 M_A_DQ41 M_A_DQ32 M_A_DQ54 M_A_DQ52 M_A_DQ53 M_A_DQ51 M_A_DQ50 M_A_DQ58 M_A_DQ59 M_A_DQ61 M_A_DQ60 M_A_DQ62 M_A_DQ63 M_A_DQ56 M_A_DQ55 M_A_DQ49 M_A_DQ48 M_A_DQ57 M_A_DQ33 M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A5 M_A_A6 M_A_A7 M_A_A4 M_A_A9 M_A_A10 M_A_A11 M_A_A8 M_A_A12 M_A_A15 M_A_A14 M_A_A13 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS0 M_A_DQS4 M_A_DQS6 M_A_DQS5 M_A_DQS7 M_A_DQS#1 M_A_DQS#0 M_A_DQS#3 M_A_DQS#2 M_A_DQS#5 M_A_DQS#6 M_A_DQS#4 M_A_DQS#7 M_B_DQ2 M_B_DQ3 M_B_A1 M_B_A9 M_B_A10 M_B_A11 M_B_A8 M_B_A12 M_B_A15 M_B_A14 M_B_A13 M_B_A2 M_B_A3 M_B_A0 M_B_A5 M_B_A6 M_B_A7 M_B_A4 M_B_DQ34 M_B_DQ35 M_B_DQ37 M_B_DQ36 M_B_DQ39 M_B_DQ38 M_B_DQ32 M_B_DQ41 M_B_DQ40 M_B_DQ46 M_B_DQ47 M_B_DQ44 M_B_DQ45 M_B_DQ43 M_B_DQ42 M_B_DQ33 M_B_DQ53 M_B_DQ51 M_B_DQ50 M_B_DQ63 M_B_DQ62 M_B_DQ56 M_B_DQ57 M_B_DQ48 M_B_DQ54 M_B_DQ55 M_B_DQ52 M_B_DQ49 M_B_DQ58 M_B_DQ59 M_B_DQ61 M_B_DQ60 M_B_DQ6 M_B_DQ7 M_B_DQ4 M_B_DQ5 M_B_DQ0 M_B_DQS#1 M_B_DQS#0 M_B_DQS#3 M_B_DQS#2 M_B_DQS#5 M_B_DQS#6 M_B_DQS#4 M_B_DQS#7 M_B_DQ10 M_B_DQ11 M_B_DQ13 M_B_DQ12 M_B_DQ15 M_B_DQ14 M_B_DQ8 M_B_DQ9 M_B_DQ1 M_B_DQS1 M_B_DQS0 M_B_DQS3 M_B_DQS2 M_B_DQS5 M_B_DQS6 M_B_DQS4 M_B_DQS7 M_B_DQ18 M_B_DQ19 M_B_DQ21 M_B_DQ20 M_B_DQ23 M_B_DQ22 M_B_DQ16 M_B_DQ25 M_B_DQ24 M_B_DQ30 M_B_DQ31 M_B_DQ28 M_B_DQ29 M_B_DQ27 M_B_DQ26 M_B_DQ17 CD_DRAMRST# M_A_DQ[63:0][13] M_A_CLK1# [13] M_A_CKE1 [13] M_A_CLK1 [13] M_A_CS#0 [13] M_A_ODT0 [13] M_A_CS#1 [13] M_A_ODT1 [13] M_A_BS#0[13] M_A_WE#[13] M_A_RAS#[13] M_A_BS#1[13] M_A_BS#2[13] M_A_CAS#[13] M_B_DQ[63:0][14] M_B_ODT1 [14] M_B_CLK0# [14] M_B_CS#0 [14] M_B_ODT0 [14] M_B_CKE0 [14] M_B_CLK0 [14] M_B_CS#1 [14] M_B_CLK1# [14] M_B_CKE1 [14] M_B_CLK1 [14] M_B_BS#1[14] M_B_BS#2[14] M_B_WE#[14] M_B_RAS#[14] M_B_CAS#[14] M_B_BS#0[14] M_A_CLK0 [13] M_A_CLK0# [13] M_A_CKE0 [13] M_A_DQS#[7:0] [13] M_A_DQS[7:0] [13] M_A_A[15:0] [13] M_B_DQS#[7:0] [14] M_B_DQS[7:0] [14] M_B_A[15:0] [14] DRAMRST_CNTRL_PCH[9,13,14] CPU_DRAMRST# [3]DDR3_DRAMRST#[13,14] +1.5VSUS Size Document Number Rev Date: Sheet of Quanta Computer Inc. PROJECT : IVY Bridge 2/4 1A Friday, November 11, 2011 ZQTA/ZQSA 4 44 Size Document Number Rev Date: Sheet of Quanta Computer Inc. PROJECT : IVY Bridge 2/4 1A Friday, November 11, 2011 ZQTA/ZQSA 4 44 Size Document Number Rev Date: Sheet of Quanta Computer Inc. PROJECT : IVY Bridge 2/4 1A Friday, November 11, 2011 ZQTA/ZQSA 4 44 IVY Bridge Processor (DDR3) D D R S Y S T E M M E M O R Y A U16C Ivy Bridge_rPGA_2DPC_Rev0p61 D D R S Y S T E M M E M O R Y A U16C Ivy Bridge_rPGA_2DPC_Rev0p61 SA_BS[0]AE10 SA_BS[1]AF10 SA_BS[2]V6 SA_CAS#AE8 SA_RAS#AD9 SA_WE#AF9 SA_CLK[0] AB6 SA_CLK[1] AA5 SA_CLK#[0] AA6 SA_CLK#[1] AB5 SA_CKE[0] V9 SA_CKE[1] V10 SA_CS#[0] AK3 SA_CS#[1] AL3 SA_ODT[0] AH3 SA_ODT[1] AG3 SA_DQS[0] D4 SA_DQS#[0] C4 SA_DQS[1] F6 SA_DQS#[1] G6 SA_DQS[2] K3 SA_DQS#[2] J3 SA_DQS[3] N6 SA_DQS#[3] M6 SA_DQS[4] AL5 SA_DQS#[4] AL6 SA_DQS[5] AM9 SA_DQS#[5] AM8 SA_DQS[6] AR11 SA_DQS#[6] AR12 SA_DQS[7] AM14 SA_DQS#[7] AM15 SA_MA[0] AD10 SA_MA[1] W1 SA_MA[2] W2 SA_MA[3] W7 SA_MA[4] V3 SA_MA[5] V2 SA_MA[6] W3 SA_MA[7] W6 SA_MA[8] V1 SA_MA[9] W5 SA_MA[10] AD8 SA_MA[11] V4 SA_MA[12] W4 SA_MA[13] AF8 SA_MA[14] V5 SA_MA[15] V7 SA_DQ[0]C5 SA_DQ[1]D5 SA_DQ[2]D3 SA_DQ[3]D2 SA_DQ[4]D6 SA_DQ[5]C6 SA_DQ[6]C2 SA_DQ[7]C3 SA_DQ[8]F10 SA_DQ[9]F8 SA_DQ[10]G10 SA_DQ[11]G9 SA_DQ[12]F9 SA_DQ[13]F7 SA_DQ[14]G8 SA_DQ[15]G7 SA_DQ[16]K4 SA_DQ[17]K5 SA_DQ[18]K1 SA_DQ[19]J1 SA_DQ[20]J5 SA_DQ[21]J4 SA_DQ[22]J2 SA_DQ[23]K2 SA_DQ[24]M8 SA_DQ[25]N10 SA_DQ[26]N8 SA_DQ[27]N7 SA_DQ[28]M10 SA_DQ[29]M9 SA_DQ[30]N9 SA_DQ[31]M7 SA_DQ[32]AG6 SA_DQ[33]AG5 SA_DQ[34]AK6 SA_DQ[35]AK5 SA_DQ[36]AH5 SA_DQ[37]AH6 SA_DQ[38]AJ5 SA_DQ[39]AJ6 SA_DQ[40]AJ8 SA_DQ[41]AK8 SA_DQ[42]AJ9 SA_DQ[43]AK9 SA_DQ[44]AH8 SA_DQ[45]AH9 SA_DQ[46]AL9 SA_DQ[47]AL8 SA_DQ[48]AP11 SA_DQ[49]AN11 SA_DQ[50]AL12 SA_DQ[51]AM12 SA_DQ[52]AM11 SA_DQ[53]AL11 SA_DQ[54]AP12 SA_DQ[55]AN12 SA_DQ[56]AJ14 SA_DQ[57]AH14 SA_DQ[58]AL15 SA_DQ[59]AK15 SA_DQ[60]AL14 SA_DQ[61]AK14 SA_DQ[62]AJ15 SA_DQ[63]AH15 SA_CLK[2] AB4 SA_CLK#[2] AA4 SA_CLK[3] AB3 SA_CLK#[3] AA3 SA_CKE[2] W9 SA_CKE[3] W10 SA_CS#[2] AG1 SA_CS#[3] AH1 SA_ODT[2] AG2 SA_ODT[3] AH2 R500 4.99K/F_4 R500 4.99K/F_4C547 0.047u/16V_4 C547 0.047u/16V_4 R503 1K/F_4 R503 1K/F_4 D D R S Y S T E M M E M O R Y B U16D Ivy Bridge_rPGA_2DPC_Rev0p61 D D R S Y S T E M M E M O R Y B U16D Ivy Bridge_rPGA_2DPC_Rev0p61 SB_BS[0]AA9 SB_BS[1]AA7 SB_BS[2]R6 SB_CAS#AA10 SB_RAS#AB8 SB_WE#AB9 SB_CLK[0] AE2 SB_CLK[1] AE1 SB_CLK#[0] AD2 SB_CLK#[1] AD1 SB_CKE[0] R9 SB_CKE[1] R10 SB_ODT[0] AE4 SB_ODT[1] AD4 SB_DQS[4] AN6 SB_DQS#[4] AN5 SB_DQS[5] AP8 SB_DQS#[5] AP9 SB_DQS[6] AK11 SB_DQS#[6] AK12 SB_DQS[7] AP14 SB_DQS#[7] AP15 SB_DQS[0] C7 SB_DQS#[0] D7 SB_DQS[1] G3 SB_DQS#[1] F3 SB_DQS[2] J6 SB_DQS#[2] K6 SB_DQS[3] M3 SB_DQS#[3] N3 SB_MA[0] AA8 SB_MA[1] T7 SB_MA[2] R7