HBA_with_edge_connector_routing_guideline

Brocade 1745 Technology Drive San Jos, CA 95110 HBA with edge connector routing guideline HBA with Edge Connector Routing Guideline S. Mokhtarzad Revision 1.0 “HBA with Edge connector Routing Guideline” is an unreleased product from BROCADE Communications. The information contained in this document is considered confidential information and should not be disclosed without prior consent of BROCADE. This information is considered preliminary and may change in substance or form prior to final product release. UNAPPROVED. This draft has not completed technical approval cycles. 08/19/09 Brocade Proprietary and Confidential Page 1 of 19 HBA with edge connector routing guideline 08/19/09 Brocade Proprietary and Confidential Page 2 of 19 HISTORY Date Rev Author Summary of Change 08/19/09 1.0 Shahriar Mokhtarzad Initial draft HBA with edge connector routing guideline APPROVAL LIST Signal Integrity Sherri Azgomi SI Engineer Shahriar Mokhtarzad SI Engineer Tony Luan SI Engineer Shaohua Li SI Engineer Hardware 08/19/09 Brocade Proprietary and Confidential Page 3 of 19 HBA with edge connector routing guideline Table of Contents HISTORY......................................................................................................................................... 2 APPROVAL LIST............................................................................................................................. 3 List of Figures .................................................................................................................................. 5 1 Introduction............................................................................................................................... 7 1.1 Reference Documents ...................................................................................................... 7 1.2 General features of HBA with edge connector ................................................................. 7 1.3 Routing rule executive summary....................................................................................... 9 1.4 Server side PCIe links and the Edge connector ............................................................... 9 1.5 SFP+ port differential pairs ............................................................................................. 11 1.6 ASIC pin padstack........................................................................................................... 13 1.7 Differential pair Transition via ......................................................................................... 16 08/19/09 Brocade Proprietary and Confidential Page 4 of 19 HBA with edge connector routing guideline List of Figures Figure 1 - HBA with edge connector ............................................................................................... 8 Figure 2 - Stackup document for a HBA with edge connector ........................................................ 8 Figure 3 - PCIe traces are routed on surface layers ..................................................................... 10 Figure 4 - PCIe differential pair phase adjustment ........................................................................ 10 Figure 5 - Plane and edge finger overlap limit............................................................................... 11 Figure 6 - SFP+ port differential pair ............................................................................................. 12 Figure 7 - SFP+ port differential pair phase tolerance adjustment................................................ 12 Figure 8 - Plane cut under SFP+ TX & RX pins ............................................................................ 13 Figure 9 - High-speed BGA pin via padstack definition (part1) ..................................................... 14 Figure 10 - High-speed BGA pin via padstack definition (part2) ................................................... 15 Figure 11 - ASIC high speed differential pin antipad on Ground layers ........................................ 16 Figure 12 - ASIC high speed differential pin antipad on Power layers.......................................... 16 Figure 13 - Center-to-center separation of differential transition via ............................................. 17 Figure 14 - Differential transition via padstack definition (part1) ................................................... 18 Figure 15 - Differential transition via padstack definition (part2) ................................................... 19 08/19/09 Brocade Proprietary and Confidential Page 5 of 19 HBA with edge connector routing guideline LIST of Tables Table 1 - Summary of the important routing rules for Highspeed traces......................................... 9 08/19/09 Brocade Proprietary and Confidential Page 6 of 19 HBA with edge connector routing guideline 1 Introduction This document provided basic guidelines for stackup and routing HBA with edge connector. 1.1 Reference Documents • BRD-1000262-01_revA.brd (Tomcat board file) 1.2 General features of HBA with edge connector The type HBAs are installed in desktop servers. The HBA's environment suffers the following shortcomings • Unpredictable air flow • Dirty and insufficient power Most HBAs of this type following high speed links • Two nGFC and/or 10GE ports for connections to outside devices which can support SFP+, active and passive cables. • 2n links of PCIe or PCIe gen2 as connection to the host server. 08/19/09 Brocade Proprietary and Confidential Page 7 of 19 HBA with edge connector routing guideline Figure 1 - HBA with edge connector Figure 2 - Stackup document for a HBA with edge connector 08/19/09 Brocade Proprietary and Confidential Page 8 of 19 HBA with edge connector routing guideline 1.3 Routing rule executive summary The following table describes the important parameter for routing the high speed traces Table 1 - Summary of the important routing rules for Highspeed traces Description Value Comment PCIe Differential pair trace Differential Impedance 85Ω DIFF Phase tolerance adjustment segment impedance 42.5 SE Phase Tolerance (end to end) 10 mil Route on layers Surface Phase Tolerance (end to end) 10mil Phase Tolerance per segment 5mil A segment is a part of the trace between any two discontinuity e.g., via, pin, etc SFP+ port Differential Impedance 100Ω DIFF Phase tolerance adjustment segment impedance 50 SE Phase Tolerance (end to end) 10mil Phase Tolerance per segment 5mil A segment is a part of the trace between any two discontinuity e.g., via, pin, etc Route on layers Surface Use Differential transition via for AC coupling caps and layer transition. Avoid layer transition if at all possible. Differential pair separation from any trace 25 mil 1.4 Server side PCIe links and the Edge connector The PCIe traces are differential pair with their geometry specified in the stackup document provided by Brocade. Several points must be considered 1. All PCIe traces must be routed differential 85Ω ob the surface layers (refer to stackup document). 2. For phase matching the PCIe differential pair use SE 42.5Ω segments as shown below (refer to stackup document). 3. All Ground and power planes are cut. Overlap of any Plane with any edge fingers ≤ 30mils. 08/19/09 Brocade Proprietary and Confidential Page 9 of 19 HBA with edge connector routing guideline Figure 3 - PCIe traces are routed on surface layers Figure 4 - PCIe differential pair phase adjustment 08/19/09 Brocade Proprietary and Confidential Page 10 of 19 HBA with edge connector routing guideline Figure 5 - Plane and edge finger overlap limit 1.5 SFP+ port differential pairs The SFP+ ports nGFC or 10GE. Since they can be connected to the outside world, special care must be taken to ensure the cleanest channel possible. 1. All SFP+ port traces must be routed differential 100Ω on the surface layers. 2. For phase matching the SFP+ port differential pair use SE 50Ω segments as shown below. 3. All ground and power planes under the TX and RX pins of the SFP+ connector are cut as shown below. 4. All transition vias are to be as shown below. 08/19/09 Brocade Proprietary and Confidential Page 11 of 19 HBA with edge connector routing guideline Figure 6 - SFP+ port differential pair Figure 7 - SFP+ port differential pair phase tolerance adjustment 08/19/09 Brocade Proprietary and Confidential Page 12 of 19 HBA with edge connector routing guideline Figure 8 - Plane cut under SFP+ TX & RX pins 1.6 ASIC pin padstack It is very important to have High speed BGA pins that are impedance matched to the rest of the channel to improve lunch of the signal by TX and reduce reflections in the RX channel. For this reason, each ASIC uses a optimized padstack to accomplish this. The current ASIC (Catapult) requires the following via padstack VIA24R12_TOMAR2. 08/19/09 Brocade Proprietary and Confidential Page 13 of 19 HBA with edge connector routing guideline Figure 9 - High-speed BGA pin via padstack definition (part1) 08/19/09 Brocade Proprietary and Confidential Page 14 of 19 HBA with edge connector routing guideline Figure 10 - High-speed BGA pin via padstack definition (part2) Notice the different "Anti pad" specification for Power, Ground layers and Keepout on Signal layers.. 08/19/09 Brocade Proprietary and Confidential Page 15 of 19 HBA with edge connector routing guideline Figure 11 - ASIC high speed differential pin antipad on Ground layers Figure 12 - ASIC high speed differential pin antipad on Power layers 1.7 Differential pair Transition via The transition via described below provided a near 100Ω impedance environment allowing the trace to transition between routing layers. Brocade padstack name for each individual via is VIA24R12_60ANTI 1. Center to center of the differential via is 60 mil. 08/19/09 Brocade Proprietary and Confidential Page 16 of 19 HBA with edge connector routing guideline 2. Antipad diameter of each via is 60 mil. 3. FHS of each via is 12 mil 4. Each differential pair transition via MUST have a Ground via no closer than 65 mil and no further than 165 mil Figure 13 - Center-to-center separation of differential transition via 08/19/09 Brocade Proprietary and Confidential Page 17 of 19 HBA with edge connector routing guideline Figure 14 - Differential transition via padstack definition (part1) 08/19/09 Brocade Proprietary and Confidential Page 18 of 19 HBA with edge connector routing guideline 08/19/09 Brocade Proprietary and Confidential Page 19 of 19 Figure 15 - Differential transition via padstack definition (part2) End ☺ 1 Introduction 1.1 Reference Documents 1.2 General features of HBA with edge connector 1.3 Routing rule executive summary 1.4 Server side PCIe links and the Edge connector 1.5 SFP+ port differential pairs 1.6 ASIC pin padstack 1.7 Differential pair Transition via